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Fix simplified mnemonics for setting PPC750 spr's.
- To: binutils at sourceware dot cygnus dot com
- Subject: Fix simplified mnemonics for setting PPC750 spr's.
- From: jtc at redback dot com (J.T. Conklin)
- Date: 11 May 2001 11:33:02 -0700
- Reply-To: jtc at redback dot com
When simplified mnemonics for setting PPC750-specific special-purpose
registers were added, they were inserted in the opcode table adjacent
to the simplified mnemonics for setting PPC403-specific device control
registers. I suspect this is why they used the extended opcode for
the PPC403's mtdcr insn.
The enclosed patch corrects the extended opcode and moves these so
they're adjacent to the other insns that set special-purpose registers.
Insns used to fetch spr's are correct.
Ok to commit?
--jtc
2001-05-11 J.T. Conklin <jtc@redback.com>
* ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of
simplified mnemonics used for setting PPC750-specific special
purpose registers.
Index: ppc-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/ppc-opc.c,v
retrieving revision 1.11
diff -c -r1.11 ppc-opc.c
*** ppc-opc.c 2001/03/30 07:36:27 1.11
--- ppc-opc.c 2001/05/11 18:11:40
***************
*** 2907,2931 ****
{ "mtdmasa3", XSPR(31,451,219), XSPR_MASK, PPC403, { RT } },
{ "mtdmacc3", XSPR(31,451,220), XSPR_MASK, PPC403, { RT } },
{ "mtdmasr", XSPR(31,451,224), XSPR_MASK, PPC403, { RT } },
- { "mtummcr0", XSPR(31,451,936), XSPR_MASK, PPC750, { RT } },
- { "mtupmc1", XSPR(31,451,937), XSPR_MASK, PPC750, { RT } },
- { "mtupmc2", XSPR(31,451,938), XSPR_MASK, PPC750, { RT } },
- { "mtusia", XSPR(31,451,939), XSPR_MASK, PPC750, { RT } },
- { "mtummcr1", XSPR(31,451,940), XSPR_MASK, PPC750, { RT } },
- { "mtupmc3", XSPR(31,451,941), XSPR_MASK, PPC750, { RT } },
- { "mtupmc4", XSPR(31,451,942), XSPR_MASK, PPC750, { RT } },
- { "mtmmcr0", XSPR(31,451,952), XSPR_MASK, PPC750, { RT } },
- { "mtpmc1", XSPR(31,451,953), XSPR_MASK, PPC750, { RT } },
- { "mtpmc2", XSPR(31,451,954), XSPR_MASK, PPC750, { RT } },
- { "mtsia", XSPR(31,451,955), XSPR_MASK, PPC750, { RT } },
- { "mtmmcr1", XSPR(31,451,956), XSPR_MASK, PPC750, { RT } },
- { "mtpmc3", XSPR(31,451,957), XSPR_MASK, PPC750, { RT } },
- { "mtpmc4", XSPR(31,451,958), XSPR_MASK, PPC750, { RT } },
- { "mtl2cr", XSPR(31,451,1017), XSPR_MASK, PPC750, { RT } },
- { "mtictc", XSPR(31,451,1019), XSPR_MASK, PPC750, { RT } },
- { "mtthrm1", XSPR(31,451,1020), XSPR_MASK, PPC750, { RT } },
- { "mtthrm2", XSPR(31,451,1021), XSPR_MASK, PPC750, { RT } },
- { "mtthrm3", XSPR(31,451,1022), XSPR_MASK, PPC750, { RT } },
{ "mtdcr", X(31,451), X_MASK, PPC403, { SPR, RS } },
{ "divdu", XO(31,457,0,0), XO_MASK, PPC64, { RT, RA, RB } },
--- 2907,2912 ----
***************
*** 3021,3026 ****
--- 3002,3026 ----
{ "mtpbu1", XSPR(31,467,1021), XSPR_MASK, PPC403, { RT } },
{ "mtpbl2", XSPR(31,467,1022), XSPR_MASK, PPC403, { RT } },
{ "mtpbu2", XSPR(31,467,1023), XSPR_MASK, PPC403, { RT } },
+ { "mtummcr0", XSPR(31,467,936), XSPR_MASK, PPC750, { RT } },
+ { "mtupmc1", XSPR(31,467,937), XSPR_MASK, PPC750, { RT } },
+ { "mtupmc2", XSPR(31,467,938), XSPR_MASK, PPC750, { RT } },
+ { "mtusia", XSPR(31,467,939), XSPR_MASK, PPC750, { RT } },
+ { "mtummcr1", XSPR(31,467,940), XSPR_MASK, PPC750, { RT } },
+ { "mtupmc3", XSPR(31,467,941), XSPR_MASK, PPC750, { RT } },
+ { "mtupmc4", XSPR(31,467,942), XSPR_MASK, PPC750, { RT } },
+ { "mtmmcr0", XSPR(31,467,952), XSPR_MASK, PPC750, { RT } },
+ { "mtpmc1", XSPR(31,467,953), XSPR_MASK, PPC750, { RT } },
+ { "mtpmc2", XSPR(31,467,954), XSPR_MASK, PPC750, { RT } },
+ { "mtsia", XSPR(31,467,955), XSPR_MASK, PPC750, { RT } },
+ { "mtmmcr1", XSPR(31,467,956), XSPR_MASK, PPC750, { RT } },
+ { "mtpmc3", XSPR(31,467,957), XSPR_MASK, PPC750, { RT } },
+ { "mtpmc4", XSPR(31,467,958), XSPR_MASK, PPC750, { RT } },
+ { "mtl2cr", XSPR(31,467,1017), XSPR_MASK, PPC750, { RT } },
+ { "mtictc", XSPR(31,467,1019), XSPR_MASK, PPC750, { RT } },
+ { "mtthrm1", XSPR(31,467,1020), XSPR_MASK, PPC750, { RT } },
+ { "mtthrm2", XSPR(31,467,1021), XSPR_MASK, PPC750, { RT } },
+ { "mtthrm3", XSPR(31,467,1022), XSPR_MASK, PPC750, { RT } },
{ "mtspr", X(31,467), X_MASK, COM, { SPR, RS } },
{ "dcbi", X(31,470), XRT_MASK, PPC, { RA, RB } },
--
J.T. Conklin
RedBack Networks