[PATCH v1 1/1] riscv: Add RVV memset via multiarch/IFUNC

[Jeff Law]

On 10/29/25 5:30 PM, Peter Bergner wrote:

> 
> 
> 
>> +ENTRY (__memset_vector)
>> +.option push
>> +.option arch, +v
>> +    mv dst_ptr, dst
>> +
>> +    vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma
>> +    vmv.v.x vdata, value
>> +L(loop):
>> +    vse8.v vdata, (dst_ptr)
>> +    sub num, num, ivl
>> +    add dst_ptr, dst_ptr, ivl
>> +    vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma
>> +    bnez num, L(loop)
>> +
>> +    ret
>> +.option pop
>> +END (__memset_vector)
> 
> Question for the wider RISC-V group, given this is a generic RVV memset
> implementation, do we want to have an early exit for num == 0?  I know there
> is a benchmark that calls a mem*() function with a (non-constant) zero "n"
> argument in some hot-ish code.  I can imagine some uarches (not TT's) might have
> issues with this loop when VL=0.  Even for performant uarches, the code above
> is a big nop.  Ala like the following:
I wasn't aware of a benchmark sensitive to the count being zero.  I'd 
tend to avoid that kind of change without hard data.  But I also 
wouldn't be crazy against it if we do have data showing its important -- 
the 0 count case is extremely unlikely in general, so the branch 
predictors should be able to lock on quickly and avoid mispredicts if we 
needed that kind of check.

Jeff