[PATCH v1 1/1] riscv: Add RVV memset via multiarch/IFUNC

[Peter Bergner]

On 10/29/25 9:10 AM, Yao Zihong wrote:
> --- /dev/null
> +++ b/sysdeps/riscv/multiarch/dl-symbol-redir-ifunc.h
> @@ -0,0 +1,27 @@
> +/* Symbol rediretion for loader/static initialization code.
> +   Copyright (C) 2023-2024 Free Software Foundation, Inc.
> +   This file is part of the GNU C Library.

s/rediretion/redirection/

Also, this is a new file, so the copyright year should be 2025 like you
used in the other new files.



> --- /dev/null
> +++ b/sysdeps/riscv/multiarch/memset_vector.S
> @@ -0,0 +1,52 @@
> +/* RVV versions memset.  RISC-V version.

This doesn't read well.  Maybe just "RISC-V RVV based memset." or similar?



> +ENTRY (__memset_vector)
> +.option push
> +.option arch, +v
> +    mv dst_ptr, dst
> +
> +    vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma
> +    vmv.v.x vdata, value
> +L(loop):
> +    vse8.v vdata, (dst_ptr)
> +    sub num, num, ivl
> +    add dst_ptr, dst_ptr, ivl
> +    vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma
> +    bnez num, L(loop)
> +
> +    ret
> +.option pop
> +END (__memset_vector)

Question for the wider RISC-V group, given this is a generic RVV memset
implementation, do we want to have an early exit for num == 0?  I know there
is a benchmark that calls a mem*() function with a (non-constant) zero "n"
argument in some hot-ish code.  I can imagine some uarches (not TT's) might have
issues with this loop when VL=0.  Even for performant uarches, the code above
is a big nop.  Ala like the following:

ENTRY (__memset_vector)
.option push
.option arch, +v
    beqz num, L(exit)
    mv dst_ptr, dst
    vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma
    vmv.v.x vdata, value
L(loop):
    vse8.v vdata, (dst_ptr)
    sub num, num, ivl
    add dst_ptr, dst_ptr, ivl
    vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma
    bnez num, L(loop)
L(exit):
    ret
.option pop
END (__memset_vector)


Thoughts?

Peter