[PATCH v1 1/1] riscv: Add RVV memset via multiarch/IFUNC

Yao Zihong zihong.plct@isrc.iscas.ac.cn
Fri Oct 31 16:27:09 GMT 2025


On Wed, 29 Oct 2025 18:30:08 -0500, Peter Bergner wrote:
> > --- /dev/null
> > +++ b/sysdeps/riscv/multiarch/memset_vector.S
> > @@ -0,0 +1,52 @@
> > +/* RVV versions memset.  RISC-V version.
> 
> This doesn't read well.  Maybe just "RISC-V RVV based memset." or similar?

"RISC-V RVV based memset" sounds good to me.

> ENTRY (__memset_vector)
> .option push
> .option arch, +v
>     beqz num, L(exit)
>     mv dst_ptr, dst
>     vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma
>     vmv.v.x vdata, value
> L(loop):
>     vse8.v vdata, (dst_ptr)
>     sub num, num, ivl
>     add dst_ptr, dst_ptr, ivl
>     vsetvli ivl, num, e8, ELEM_LMUL_SETTING, ta, ma
>     bnez num, L(loop)
> L(exit):
>     ret
> .option pop
> END (__memset_vector)

For reference, here are some preliminary data points from two available
RVV platforms (MUSE-Pi / SpacemiT M1 and CanMV-K230).

Method:
- glibc’s bench-memset
- Compared current patch vs variant with early-exit branch
- Warm-up + 100 runs
- 95% confidence intervals of geometric-mean ratios are reported below
  (new/base, <1.0 would indicate speedup)

Results (range across runs):

MUSE-Pi (M1):
0B:          [0.315434, 0.322901]
0–8B:        [1.011125, 1.015549]
8–16B:       [1.027407, 1.030753]
16–32B:      [1.021645, 1.023873]
32–64B:      [1.012177, 1.013721]
64–128B:     [1.012838, 1.019760]
128–256B:    [1.001406, 1.007336]
256–512B:    [1.004655, 1.007536]
512-1024B:   [1.010748, 1.011683]
Overall:     [1.009386, 1.009901]

K230:
0B:          [0.306655, 0.315313]
0–8B:        [0.909596, 0.917210]
8–16B:       [1.012617, 1.021653]
16–32B:      [1.017490, 1.023832]
32–64B:      [1.020580, 1.025322]
64–128B:     [1.014626, 1.032611]
128–256B:    [1.007159, 1.021814]
256–512B:    [1.014943, 1.023765]
512-1024B:   [0.997535, 1.002005]
Overall:     [1.008630, 1.009848]

This is a small sample set, so the results should be considered indicative only.
It would be helpful to see measurements on other RISC-V vector implementations
as well.

Thanks,
Zihong



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