Patch to implement rotates by zero

[Eric Christopher]

On Tue, 2002-08-20 at 06:19, Maciej W. Rozycki wrote:
> On 17 Aug 2002 cgd@broadcom.com wrote:
> 
> > AFAIK, 'sll' w/ a shift of 0 is only guaranteed to sign-extend by
> > MIPS64.  I've seen no previous documentation that defined that it must
> > work that way.
> 
>  Well, the behaviour is defined explicitly for "sll" and "sllv" by "MIPS
> R4000 Microprocessor User's Manual" (pp. A-140, A-141), the original spec
> for the original MIPS III processor, so the assumption should be any MIPS
> III+ implementation must do them this way; otherwise it is non-compliant
> (or simply broken).  There is a note on broken code generated by some
> assemblers there, though.  The book is available from www.mips.com. 

That's a pretty big assumption though :) I think I like it the other
way.

-eric

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