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[PATCH 0/4] Arm64: corrections to recent F64MM / I8MM additions
- From: Jan Beulich <JBeulich at suse dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: Richard Earnshaw <rearnsha at arm dot com>, Marcus Shawcroft <marcus dot shawcroft at arm dot com>, Mihail Ionescu <mihail dot ionescu at arm dot com>
- Date: Fri, 27 Dec 2019 10:33:54 +0000
- Subject: [PATCH 0/4] Arm64: corrections to recent F64MM / I8MM additions
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Judging from the specification, there seem to be a number of issues.
However, I may well be wrong with some or all of them - both the
documentation or my reading of it may as well be incorrect.
1: correct 64-bit element fmmla encoding
2: correct uzp{1,2} mnemonics
3: correct {su,us}dot SIMD encodings
4: correct address index operands for LD1RO{H,W,D}
Jan