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Re: [PATCH] Opcodes: (BRCLR / BRSET) Disassemble reserved codes instead of aborting.
On Fri, Aug 17, 2018 at 11:27:11AM +0100, Nick Clifton wrote:
Hi John,
> opcodes/
> * s12z-dis.c: BM_RESERVED1 to behave like BM_OPR_REG, and
> BM_RESERVED0 like BM_REG_IMM.
> +2018-07-28 John Darrington <john@darrington.wattle.id.au>
> +
> + * testsuite/gas/s12z/bit-manip-invalid.d: New file.
> + * testsuite/gas/s12z/bit-manip-invalid.s: New file.
> + * testsuite/gas/s12z/s12z.exp: Add them.
> +
Approved - please apply.
So far as I'm aware, I don't have the necessary permission to push to
the git repository.
> + /* The NXP documentation is vague about BM_RESERVED0 and BM_RESERVED1,
> + and contains obvious typos.
> + However the Freescale tools and experiments with the chip itself
> + seem to indicate that they behave like BM_REG_IMM and BM_OPR_REG
> + respectively. */
I have to say that this is a little bit suspicious. If they behave the
in the same way as already defined modes, then why are they used at all ?
Plus of course the name implies that they are reserved for a use that has
yet to be defined, and should, by implication, not be used at the moment.
I agree with both points. Which is why initially I left these cases to
abort - on the grounds that they should never happen. After I found
that at least one of them does happen, I made the effort to find out
exactly *what* happens. Note that gas will never generate these codes.
However if presented with them the opcodes library will now disassemble
them in the same way as other tools.
J'
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