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RE: [PATCH] microMIPS opcode table loads

> -----Original Message-----
> From: Maciej W. Rozycki []
> Sent: Monday, November 11, 2013 8:21 PM
> To: Moore, Catherine
> Cc: Richard Sandiford;
> Subject: RE: [PATCH] microMIPS opcode table loads
> On Mon, 11 Nov 2013, Moore, Catherine wrote:
> > > I believe ACLR and ASET need to have the attribute set as well, as
> > > do the DSP load (LWX, etc.) and MSA load (LD.W, etc.) instructions.
> > > Unsure about PREF and PREFX -- that'll depend on usage and also the
> > > value of hint, so it may be that we have to leave them alone.
> >
> > I've attached an updated patch that adds the LW attribute for these
> > additional opcodes.
>  PREF/PREFE/PREFX?  I now see you included them in the standard MIPS part
> (except from PREFE that'll need a follow-up adjustment), so this one has to
> stay consistent.  Note that some prefetch modes (25) may not actually imply
> a memory read, but I think it's safe to assume all may.

I've now updated the micromips opcode table to include the LM attribute for the PREF* instructions.
I've also added the attribute to the PREFE instruction in mips-opc.c.

Okay now?



Attachment: umips-opcodes.patch
Description: umips-opcodes.patch

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