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RE: [PATCH] microMIPS opcode table loads
- From: "Maciej W. Rozycki" <macro at codesourcery dot com>
- To: "Moore, Catherine" <Catherine_Moore at mentor dot com>
- Cc: Richard Sandiford <rdsandiford at googlemail dot com>, "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Tue, 12 Nov 2013 01:20:32 +0000
- Subject: RE: [PATCH] microMIPS opcode table loads
- Authentication-results: sourceware.org; auth=none
- References: <FD3DCEAC5B03E9408544A1E416F11242012EA8FE05 at NA-MBX-04 dot mgc dot mentorg dot com> <alpine dot DEB dot 1 dot 10 dot 1311082212571 dot 21686 at tp dot orcam dot me dot uk> <FD3DCEAC5B03E9408544A1E416F11242012EA92560 at NA-MBX-04 dot mgc dot mentorg dot com>
On Mon, 11 Nov 2013, Moore, Catherine wrote:
> > I believe ACLR and ASET need to have the attribute set as well, as do the
> > DSP load (LWX, etc.) and MSA load (LD.W, etc.) instructions. Unsure about
> > PREF and PREFX -- that'll depend on usage and also the value of hint, so
> > it may be that we have to leave them alone.
> I've attached an updated patch that adds the LW attribute for these
> additional opcodes.
PREF/PREFE/PREFX? I now see you included them in the standard MIPS part
(except from PREFE that'll need a follow-up adjustment), so this one has
to stay consistent. Note that some prefetch modes (25) may not actually
imply a memory read, but I think it's safe to assume all may.