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9.38.2 RISC-V Directives ¶

The following table lists all available RISC-V specific directives.

.align size-log-2 ¶

Align to the given boundary, with the size given as log2 the number of bytes to align to.

.half value ¶

.word value

.dword value

Emits a half-word, word, or double-word value at the current position.

.dtprelword value ¶

.dtpreldword value

Emits a DTP-relative word (or double-word) at the current position. This is meant to be used by the compiler in shared libraries for DWARF debug info for thread local variables.

.uleb128 values ¶

.sleb128 values

Emits signed or unsigned LEB128 values at the current position. This only accepts constant expressions, because symbol addresses can change with relaxation, and we don’t support relocations to modify LEB128 values at link time. An exception are differences between symbols, which may be used with .uleb128.

.option argument ¶

Modifies RISC-V specific assembler options inline with the assembly code. This is used when particular instruction sequences must be assembled with a specific set of options. For example, since we relax addressing sequences to shorter GP-relative sequences when possible the initial load of GP must not be relaxed and should be emitted as something like

	.option push
	.option norelax
	la gp, __global_pointer$
	.option pop

in order to produce after linker relaxation the expected

	auipc gp, %pcrel_hi(__global_pointer$)
	addi gp, gp, %pcrel_lo(__global_pointer$)

instead of just

	addi gp, gp, 0

It’s not expected that options are changed in this manner during regular use, but there are a handful of esoteric cases like the one above where users need to disable particular features of the assembler for particular code sequences. However, it’s also useful to enable and reset the extensions for some specific code regions by ‘.option arch, +ext’ and ‘.option arch, ISA’. Or use ‘.option push’ and ‘.option pop’ at the beginning and end of the code, so that we can indirectly turn on and off extensions in this range. This is very common in the ifunc libraries. We can support functions which are implemented by different extensions in the same library, but these should not affect any file-level settings, like the elf architecture attribute. The complete list of option arguments is shown below:

push

pop

Pushes or pops the current option stack. These should be used whenever changing an option in line with assembly code in order to ensure the user’s command-line options are respected for the bulk of the file being assembled.

rvc

norvc

Enable the generation of base compressed instructions (C extension), or disable the generation of all compressed instructions (C and all Zc* extensions). Instructions are opportunistically compressed by the RISC-V assembler when possible, but sometimes this behavior is not desirable, especially when handling alignments.

pic

nopic

Enables or disables position-independent code generation. Unless you really know what you’re doing, this should only be at the top of a file.

relax

norelax

Enables or disables relaxation. The RISC-V assembler and linker opportunistically relax some code sequences, but sometimes this behavior is not desirable.

csr-check

no-csr-check

Enables or disables the CSR checking.

arch, +extension[version] [,...,+extension_n[version_n]]

arch, ISA

Enable or reset the extensions for specific code region. For example, ‘.option arch, +m2p0’ means add m extension with version 2.0. ‘.option arch, rv32imac’ means reset and overwrite the previous settings by rv32imac.

.insn type, operand [,...,operand_n] ¶

.insn insn_length, value

.insn value

This directive permits the numeric representation of an instructions and makes the assembler insert the operands according to one of the instruction formats for ‘.insn’ (RISC-V Instruction Formats). For example, the instruction ‘add a0, a1, a2’ could be written as ‘.insn r 0x33, 0, 0, a0, a1, a2’. But in fact, the instruction formats are difficult to use for some users, so most of them are using ‘.word’ to encode the instruction directly, rather than using ‘.insn’. It is fine for now, but will be wrong when the mapping symbols are supported, since ‘.word’ will not be shown as an instruction, it should be shown as data. Therefore, we also support two more formats of the ‘.insn’, the instruction ‘add a0, a1, a2’ could also be written as ‘.insn 0x4, 0xc58533’ or ‘.insn 0xc58533’. When the insn_length is set, then assembler will check if the value is a valid insn_length bytes instruction.

.attribute tag, value ¶

Set the object attribute tag to value.

The tag is either an attribute number, or one of the following: Tag_RISCV_arch, Tag_RISCV_stack_align, Tag_RISCV_unaligned_access, Tag_RISCV_priv_spec, Tag_RISCV_priv_spec_minor, Tag_RISCV_priv_spec_revision.

.bfloat16 value ¶

Floating point constructors for the bfloat16 type, example usage:

	.bfloat16 12.0
	.bfloat16 NaN
	.bfloat16 0b:ffc1