The following table lists all available RISC-V specific options.
Generate position-independent code
Don’t generate position-independent code (default)
Select the base isa, as specified by ISA. For example -march=rv32ima.
Selects the ABI, which is either "ilp32" or "lp64", optionally followed by "f", "d", or "q" to indicate single-precision, double-precision, or quad-precision floating-point calling convention, or none to indicate the soft-float calling convention.