igen: The kernel

Kernel variations

Basic

        cia = processor->program_counter;
        while (1) {
          /* check events */
          ....

          /* fetch next instruction from memory */
          instruction = processor->instruction_map->read(processor, cia);

          /* decode the instruction, locating the semantic code */
          semantic = idecode(instruction, processor, cia);

          /* execute this instruction, update the program counter */
          cia = semantic(instruction, processor, cia);

        }

Multi-processor

        while (1) {
          /* check for events */
          ....

          /* issue one instruction for each processor */
          for (cpu_nr = 0; cpu_nr < nr_cpus; cpu_nr++) {

            /* like the single processor case, fetch-decode-issue */
            cia = processor->program_counter;
            instruction = processor->instruction_map->read(processor, cia);
            semantic = idecode(instruction, processor, cia);
            cia = semantic(instruction, processor, cia);

            /* save the updated instruction address */
            processor->set_program_counter(cia);

          }
        }

Cache

        cia = processor->program_counter;
        while (1) {
          /* check events */
          ....

          /* look for the instruction in the cache, if a miss fill it */
          entry = cache_lookup(processor, cia);
          if (entry->cia != cia) {
            instruction = processor->instruction_map->read(processor, cia);
            cache_update(entry, instruction, processor, cia);
          }

          /* now issue it */
          ASSERT(entry->cia == cia);
          entry->semantic(entry, processor, cia);

        }

Jump (with cache)

        cia = processor->program_counter;

        /* check events */
        ....

        /* get a valid cache entry? run the semantic code */
        entry = cache_lookup(processor, cia);
        if (entry->cia == cia)
          goto *entry->semantic;

        /* common code handling a cache miss */
       cache_miss:
        ...
          entry->semantic = &&insn_X;
        ...;
        ASSERT(entry->cia == cia);
        goto *entry->semantic;

        ....

        /* specific instruction */
       insn_X:
        ....

Hybrids

Exceptions

Restart

Abort

Generating a kernel - igen