[RFC PATCH 1/2] RISC-V: Add VLA support and Fortran declarations to RVV libmvec

[Adhemerval Zanella Netto]

On 14/05/26 09:24, zhou.yanan@zte.com.cn wrote:
> In-Reply-To: <af3aceaa-dcf1-4fa6-ad7e-a7fd7444a0c5@spacemit.com>
> References: <af3aceaa-dcf1-4fa6-ad7e-a7fd7444a0c5@spacemit.com>
> 
> Hi Zhijin, 
> Rivos libvecm repository has been re-licensed under the MIT license, which is believed to be compatible with glibc's LGPL-2.1+.
> Based on the ongoing psABI discussion:
> https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/455
> this series implements the following changes:
> 1. Mangling update: change the vector math symbol prefix from _ZGV<lmul>N<simdlen>v_* to _ZGVr<lmul>N<simdlen>v_*, adding the architecture tag <r> as specified in the psABI draft.
> 2. Add VLA support: generate _ZGVr<lmul>Nxv_* symbols (e.g. _ZGVr2Nxv_acos) in addition to the existing VLS clones.
> 
> It also includes two additional improvements:
> 3. Add Fortran vector math builtin declarations in finclude/math-vector-fortran.h for gfortran auto-vectorization.
> 4. Replace the double-precision exp() implementation with a faster algorithm adapted from the ARM Optimized Routines (PATCH 2/2).
> 
> VLA portability note
> Compiled with -march=rv64gcv (zvl128b), the library runs on all VLEN≥128 hardware.  
> However, the auto-vectorizer assumes VLEN=128, so loops underutilize wider hardware (on 256-bit machines only half the register width is used).  
> For best performance, compile applications with -march=rv64gcv_zvl${N}b so GCC can choose an appropriate LMUL. 
> SpacemiT K1 (VLEN=256, exp, N=1M, REPEAT=1000):  
> -march=rv64gcv: 39.84 s  
> -march=rv64gcv_zvl256b: 17.79 s  (~2.2×)
>
It is not clear to me why you sent a RFC patch against a out-of-tree branch,
or did you forgot the actually send the libvmec riscv patch prior?