[PATCH v3] riscv: Fix RV32 libthread_db THREAD_SELF register layout

[Peter Bergner]

On 6/24/26 12:28 PM, Shengwen Cheng wrote:
> The RISC-V libthread_db THREAD_SELF descriptor currently assumes 64-bit
> general-register slots:
> 
>   REGISTER (64, 64, 4 * 8, ...)
> 
> That is correct for RV64, where tp/x4 is at byte offset 4 * 8 in the
> general register set.  On RV32, general-register slots are 32-bit wide,
> so tp/x4 is at byte offset 4 * 4.
> 
> Using the RV64 layout on RV32 makes libthread_db read the wrong thread
> pointer value and prevents GDB from enabling pthread-aware thread
> debugging.
> 
> Use a helper macro to pass the RISC-V register size into the
> DB_THREAD_SELF definition.
> 
> Signed-off-by: Shengwen Cheng <shengwen1997.tw@gmail.com>
> Reviewed-by: Peter Bergner <bergner@tenstorrent.com>

Pushed now.  Thanks!

Peter