[PATCH v1 1/1] riscv: Add RVV memset via multiarch/IFUNC

Jeff Law jlaw@ventanamicro.com
Wed Oct 29 23:37:57 GMT 2025


On 10/29/25 12:03 PM, Darius Rad wrote:
> On Thu, Oct 30, 2025 at 12:10:22AM +0800, Yao Zihong wrote:
>> This patch adds an RVV-optimized implementation of memset for RISC-V and
>> enables it through the existing multiarch/IFUNC mechanism.
>>
>> The implementation integrates Hau Hsu’s 2023 RVV work under a unified
>> ifunc-based framework. A vectorized version (__memset_vector) is added
>> alongside the generic fallback (__memset_generic). The runtime resolver
>> selects the RVV variant when RISCV_HWPROBE_KEY_IMA_EXT_0 reports vector
>> support (V).
>>
> 
> This needs to use dl_hwcap, not hwprobe, to decide whether to select vector
> or not, since vector may be present but not enabled (by prctl).
No, the preferred way for this on RISC-V is hwprobe, not hwcaps.

jeff


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