[PATCH v1 1/1] riscv: Add RVV memset via multiarch/IFUNC

[Adhemerval Zanella Netto]

On 29/10/25 15:03, Darius Rad wrote:
> On Thu, Oct 30, 2025 at 12:10:22AM +0800, Yao Zihong wrote:
>> This patch adds an RVV-optimized implementation of memset for RISC-V and
>> enables it through the existing multiarch/IFUNC mechanism.
>>
>> The implementation integrates Hau Hsu’s 2023 RVV work under a unified
>> ifunc-based framework. A vectorized version (__memset_vector) is added
>> alongside the generic fallback (__memset_generic). The runtime resolver
>> selects the RVV variant when RISCV_HWPROBE_KEY_IMA_EXT_0 reports vector
>> support (V).
>>
> 
> This needs to use dl_hwcap, not hwprobe, to decide whether to select vector
> or not, since vector may be present but not enabled (by prctl).
> 

This adds another complexity on RISC-V ifunc selection, and this makes all
hwprobe mechanism moot since kernel is now pushing for *also* check hwcap.

What prevents kernel to disable RISCV_HWPROBE_IMA_V if the parents sets
PR_RISCV_V_VSTATE_CTRL_OFF?