[PATCH v1 0/2] riscv: Add RVV memset for both multiarch and non-multiarch builds

[Yao Zihong]

Hi all,

This series introduces an RVV implementation of memset for RISC-V,
covering both multiarch (IFUNC) and non-multiarch builds.

It serves as a minimal pilot for integrating Hau Hsu’s 2023 RVV work
under a unified framework.

Patch 1/2 imports and integrates the RVV memset implementation.
Patch 2/2 adds assembler feature detection to skip RVV code when the
assembler lacks vector instruction support.

Once validated, this approach will be generalized to the rest of the
string/memory routines.

---

Background
----------
Original RVV implementations were proposed by Hau Hsu in[1].

My earlier patch series attempted to integrate Hau’s work for the entire
str*/mem* family under a unified multiarch/IFUNC framework.

Jeff Law later suggested narrowing the scope to a single function to
validate the integration model. He also identified a hang issue in my
earlier version and provided a corrective patch introducing a redirect
header to fix it[2].

Following feedback from Adhemerval Zanella Netto, the approach was aligned with
other architectures (e.g. PowerPC) to ensure that the RVV implementation
can also be selected in non-multiarch builds.

Assembler feature detection logic is based on Dai Chengrong’s work[3].

---

Testing
--------
Testing was conducted on MUSE-Pi (SpacemiT M1) under both
multiarch and non-multiarch configurations. The glibc testsuite passed
without any additional regressions compared with glibc master.

Summary of test results for(MUSE-Pi):
  UNSUPPORTED: elf/tst-env-setuid
  UNSUPPORTED: elf/tst-valgrind-smoke
  UNSUPPORTED: io/tst-faccessat-setuid
  UNSUPPORTED: libio/tst-fopen-compat
  UNSUPPORTED: math/test-ceil-except-2
  UNSUPPORTED: math/test-fesetexcept-traps
  UNSUPPORTED: math/test-fexcept-traps
  UNSUPPORTED: math/test-floor-except-2
  UNSUPPORTED: math/test-nearbyint-except-2
  UNSUPPORTED: math/test-trunc-except-2
  UNSUPPORTED: misc/tst-adjtimex
  UNSUPPORTED: misc/tst-clock_adjtime
  UNSUPPORTED: misc/tst-epoll-ioctls
  UNSUPPORTED: misc/tst-ntp_adjtime
  UNSUPPORTED: misc/tst-pkey
  UNSUPPORTED: nptl/test-cond-printers
  UNSUPPORTED: nptl/test-condattr-printers
  UNSUPPORTED: nptl/test-mutex-printers
  UNSUPPORTED: nptl/test-mutexattr-printers
  UNSUPPORTED: nptl/test-rwlock-printers
  UNSUPPORTED: nptl/test-rwlockattr-printers
  UNSUPPORTED: posix/tst-spawn-cgroup
  UNSUPPORTED: string/tst-strerror
  UNSUPPORTED: string/tst-strsignal
  UNSUPPORTED: time/tst-clock_settime
  UNSUPPORTED: time/tst-settimeofday
  XPASS: elf/tst-protected1a
  XPASS: elf/tst-protected1b
  FAIL: misc/tst-gethostid
  FAIL: nss/test-netdb
  FAIL: resolv/tst-bug18665
  FAIL: resolv/tst-bug18665-tcp
  FAIL: resolv/tst-ns_rr_cursor
  FAIL: resolv/tst-resolv-ai_idn
  FAIL: resolv/tst-resolv-ai_idn-latin1
  FAIL: resolv/tst-resolv-ai_idn-nolibidn2
  FAIL: resolv/tst-resolv-aliases
  FAIL: resolv/tst-resolv-basic
  FAIL: resolv/tst-resolv-byaddr
  FAIL: resolv/tst-resolv-invalid-cname
  FAIL: resolv/tst-resolv-noaaaa
  FAIL: resolv/tst-resolv-noaaaa-vc
  FAIL: resolv/tst-resolv-res_init-multi
  FAIL: resolv/tst-resolv-search
  FAIL: resolv/tst-resolv-semi-failure
  FAIL: resolv/tst-resolv-short-response
  FAIL: resolv/tst-resolv-threads
                  === Summary of results ===
       19 FAIL
     6500 PASS
       26 UNSUPPORTED
       16 XFAIL
        2 XPASS

---

[1] https://patchwork.sourceware.org/project/glibc/patch/20230421075405.14892-3-hau.hsu@sifive.com/
[2] https://inbox.sourceware.org/libc-alpha/7594c7f5-8bd6-45df-8218-ce74eff6e152@gmail.com/
[3] https://patchwork.sourceware.org/project/glibc/patch/20250319084202.4034345-1-daichengrong@iscas.ac.cn/

---

Yao Zihong (2):
  riscv: Add RVV memset for both multiarch and non-multiarch builds
  riscv: Skip RVV build when assembler lacks vector support

 config.h.in                                   |  3 +
 sysdeps/riscv/configure                       | 34 +++++++++++
 sysdeps/riscv/configure.ac                    | 24 ++++++++
 .../riscv/multiarch/dl-symbol-redir-ifunc.h   | 27 +++++++++
 sysdeps/riscv/multiarch/memset-generic.c      | 26 ++++++++
 sysdeps/riscv/multiarch/memset_vector.S       | 24 ++++++++
 sysdeps/riscv/preconfigure                    |  9 +++
 sysdeps/riscv/preconfigure.ac                 |  9 +++
 sysdeps/riscv/rv32/rvv/Implies                |  2 +
 sysdeps/riscv/rv64/rvv/Implies                |  2 +
 sysdeps/riscv/rvv/memset.S                    | 53 +++++++++++++++++
 .../unix/sysv/linux/riscv/multiarch/Makefile  |  8 +++
 .../linux/riscv/multiarch/ifunc-impl-list.c   | 17 ++++++
 .../unix/sysv/linux/riscv/multiarch/memset.c  | 59 +++++++++++++++++++
 14 files changed, 297 insertions(+)
 mode change 100644 => 100755 sysdeps/riscv/configure
 create mode 100644 sysdeps/riscv/multiarch/dl-symbol-redir-ifunc.h
 create mode 100644 sysdeps/riscv/multiarch/memset-generic.c
 create mode 100644 sysdeps/riscv/multiarch/memset_vector.S
 mode change 100644 => 100755 sysdeps/riscv/preconfigure
 create mode 100644 sysdeps/riscv/rv32/rvv/Implies
 create mode 100644 sysdeps/riscv/rv64/rvv/Implies
 create mode 100644 sysdeps/riscv/rvv/memset.S
 create mode 100644 sysdeps/unix/sysv/linux/riscv/multiarch/memset.c

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2.47.2