[PATCH v1] ppc64le: Power 10 rawmemchr clobbers v20 (bug #33091)

Segher Boessenkool segher@kernel.crashing.org
Sat Oct 11 21:42:25 GMT 2025


On Sat, Oct 11, 2025 at 07:26:22AM -0500, Sachin Monga wrote:
> The vector non-volatile register v20 is replaced
> with volatile register v17 for VREG_ZERO macro.

A commit message should read like a command, "Replace vr20 by vr17 since
it shoulf be a volatile register here", not some passive mode "this is
what happens" thing.

So, why should it not be a register that is non-volatile in the calling
convention here?  Please give us more context, hopefully something that
makes this patch obviously correct and a good idea :-)


Segher


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