[PATCH v1] ppc64le: Power 10 rawmemchr clobbers v20 (bug #33091)
Sachin Monga
smonga@linux.ibm.com
Sat Oct 11 12:26:22 GMT 2025
The vector non-volatile register v20 is replaced
with volatile register v17 for VREG_ZERO macro.
Signed-off-by: Sachin Monga <smonga@linux.ibm.com>
---
This patch is reg tested.
sysdeps/powerpc/powerpc64/le/power10/strlen.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sysdeps/powerpc/powerpc64/le/power10/strlen.S b/sysdeps/powerpc/powerpc64/le/power10/strlen.S
index ec644d5bff..29a5a7d960 100644
--- a/sysdeps/powerpc/powerpc64/le/power10/strlen.S
+++ b/sysdeps/powerpc/powerpc64/le/power10/strlen.S
@@ -31,7 +31,7 @@
# define FUNCNAME RAWMEMCHR
# endif
# define MCOUNT_NARGS 2
-# define VREG_ZERO v20
+# define VREG_ZERO v17
# define OFF_START_LOOP 256
# define RAWMEMCHR_SUBTRACT_VECTORS \
vsububm v4,v4,v18; \
--
2.47.3
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