[PATCH v3 1/1] riscv: Add RVV memset via multiarch/IFUNC

Darius Rad darius@bluespec.com
Mon Nov 24 13:07:08 GMT 2025


On Fri, Nov 21, 2025 at 10:41:58AM +0800, Yao Zihong wrote:
> Hi Darius,
> 
> Would this address the concern?
> 
> > Currently, the resolver still selects the RVV variant even when the
> > extension has been disabled via prctl(). As a consequence, any process
> > that disables RVV via prctl() will receive SIGILL when executing the
> > first vector instruction.

Since a process cannot disable RVV for itself, and since this patch
obligates the use of vector in memset(), perhaps a more clear way to phrase
the second sentence would be:

As a consequence, any process that has RVV disabled via prctl() will
receive SIGILL when calling memset().

> 
> Thanks,
> Zihong
> 


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