[PATCH v5 1/1] riscv: Add RVV memset for both multiarch and non-multiarch builds

Peter Bergner bergner@tenstorrent.com
Sat Dec 20 00:09:13 GMT 2025


On 12/16/25 9:00 PM, Peter Bergner wrote:
> On 12/11/25 7:33 AM, Yao Zihong wrote:
>> This patch adds an RVV-optimized implementation of memset for RISC-V and
>> enables it for both multiarch (IFUNC) and non-multiarch builds.
>>
>> The implementation integrates Hau Hsu's 2023 RVV work under a unified
>> ifunc-based framework. A vectorized version (__memset_vector) is added
>> alongside the generic fallback (__memset_generic). The runtime resolver
>> selects the RVV variant when RISCV_HWPROBE_KEY_IMA_EXT_0 reports vector
>> support (RVV).
>>
>> Currently, the resolver still selects the RVV variant even when the RVV
>> extension is disabled via prctl(). As a consequence, any process that
>> has RVV disabled via prctl() will receive SIGILL when calling memset().
>>
>> Tested on MUSE-Pi (SpacemiT M1). No regressions were observed compared
>> with glibc master when the RVV extension was not disabled via prctl().
> 
> I'm sorry for the delay, but given the late development stage, I wanted to
> do some extra testing with the patch myself.  I built the patch with and
> without RVV enabled in GCC and with and without --disable-multi-arch and
> I can confirm the no regressions result you found.  I also confirmed that
> a no-RVV build using --disable-multi-arch always calls __memset_generic,
> while a RVV --disable-multi-arch build always calls __memset_vector like
> we want.  The no-RVV and RVV multiarch builds always call through the
> ifunc resolver and we correctly call the __memset_vector routine when
> running on a RVV enabled system.
> 
> So LGTM!
> 
> Reviewed-by: Peter Bergner <bergner@tenstorrent.com>

...and now pushed.

Peter




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