[PATCH 0/2] riscv: Prevent potential unaligned memory access during dynamic relocation

[Kito Cheng]

We found a potential unaligned store during resolving the dynamic relocation stage - R_RISCV_RELATIVE might be located in a non-XLEN aligned location, because that is used in debug sections.

However this issue wasn't discovered before since RISC-V Linux is enabled the unaligned memory access handler by default, so this isn't a big issue so far, but as we know the unaligned memory access handler is very expensive, and that might impact the program start up time, so letting compiler emit sequence of load/store would be much better solution.

NOTE: ARM and MIPS has similar issue:

ARM: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=51456
MIPS: https://gcc.gnu.org/legacy-ml/gcc-help/2005-07/msg00325.html