__HAVE_64B_ATOMICS and alignment

[Joseph Myers]

On Thu, 13 Apr 2017, Florian Weimer wrote:

> On 11/28/2016 12:51 PM, Torvald Riegel wrote:
> > > This means that for an LP32 architecture such as i686 which could
> > > conceivable provide 64-bit atomics, we might try to perform an atomic
> > > operation on a potentially misaligned uint64_t value.
> > i686 has no 64b atomic loads or stores.
> 
> double loads and stores via the FPU are atomic, and they preserve all bit
> patterns.  (Starting with the Pentium, the FPU was sometimes used to implement

Note that only works for *integer* loads and stores (fild / fistp).  You 
can't use float or double loads and stores for arbitrary bit patterns 
because if the bit patterns look like signaling NaNs, they'll be converted 
to (long double) qNaNs, the "invalid" exception will be raised and the bit 
pattern will not be preserved when the valid is stored back from the FPU.

-- 
Joseph S. Myers
joseph@codesourcery.com