__HAVE_64B_ATOMICS and alignment

[Richard Henderson]

On 04/13/2017 10:16 AM, Torvald Riegel wrote:
> On Thu, 2017-04-13 at 07:10 +0200, Florian Weimer wrote:
>> On 11/28/2016 12:51 PM, Torvald Riegel wrote:
>>>> This means that for an LP32 architecture such as i686 which could
>>>> conceivable provide 64-bit atomics, we might try to perform an atomic
>>>> operation on a potentially misaligned uint64_t value.
>>> i686 has no 64b atomic loads or stores.
>>
>> double loads and stores via the FPU are atomic, and they preserve all
>> bit patterns.
>
> I believe that the precise status on this is that we believe that they
> are atomic, but it's not explicitly guaranteed.

No, it is guaranteed.  See Vol 3, Section 8.1.1:

# The Pentium processor (and newer processors since) guarantees that
# the following additional memory operations will always be carried
# out atomically:
# • Reading or writing a quadword aligned on a 64-bit boundary


r~