[RFC] Lock elision implementation guidelines

[Andi Kleen]

Dominik Vogt <vogt@linux.vnet.ibm.com> writes:
>
> It probably depends on the hardware implementation details of the
> HTM system.  The idea of the test program was to "break" a HTM
> that aborts a transaction that writes a memory cell if that cell
> is read afterwards from another transaction or outside a
> transaction.

The test case does not break TSX. It has a near perfect commit
rate in fact.

> This is the case for the zEC12, but I don't know the
> details of TSX very well, and I only have access to a
> z/architecture machine.  Is there any document available where I
> can look up the TSX implementation details?  

http://www.intel.com/software/tsx

e.g. the IDF presentation and the optimization guide.

-Andi

-- 
ak@linux.intel.com -- Speaking for myself only