[PATCH] Mark sparc %fsr load and store inline asms as volatile.

David Miller davem@davemloft.net
Fri May 11 21:57:00 GMT 2012


From: Roland McGrath <roland@hack.frob.com>
Date: Fri, 11 May 2012 14:50:03 -0700 (PDT)

>> Better for us would be builtins to access the FPU status register
>> state, and then express the dependencies inside of GCC so it can't
>> reorder those relative to other float operations.
> 
> Does that need actual built-ins per se or just grokking "%fsr"
> as a register name?

I think real builtins would be appropriate here.

Sparc (specifically UltraSPARC-III and later) has another special
feature, via the "siam" (Set Interval Arithmetic Mode) instruction,
which allows one to set an override rounding mode quickly without
having to do the %fsr loads and stores.

I mention it because it would also benefit from being able to
synchronize against all FPU operations.  We have a builtin for it, but
it's an UNSPEC which is essentially like a volatile asm, and all the
unwanted negatives that entails.



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