[PATCH] Minor performance improvement for AMD64 assembly routines

[Nicholas Miell]

AMD x86-64 processors cannot predict single-byte near RET instructions
when they are either the target of a branch or immediately preceded by a
conditional branch. (See section 6.2 in the Athlon 64/Opteron
optimization guide)

AMD's recommended solution is to either reorder instructions so that
this situation does not occur, or use the REP prefix on the RET
instruction.

Recent versions of GCC will do this automatically, but glibc contains
many hand written assembly routines.

The attached patch changes all (that I found, anyway) relevant RET
instructions to REP RET.

-- 
Nicholas Miell <nmiell@comcast.net>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: amd64-repret.patch
Type: text/x-patch
Size: 2435 bytes
Desc: Replace RET with REP RET where necessary.
URL: <http://sourceware.org/pipermail/libc-alpha/attachments/20041206/2fc84150/attachment.bin>