[Bug string/29007] New: Undefined behavior in strrchr-sse2 on Intel

[goldstein.w.n at gmail dot com]

https://sourceware.org/bugzilla/show_bug.cgi?id=29007

            Bug ID: 29007
           Summary: Undefined behavior in strrchr-sse2 on Intel
           Product: glibc
           Version: 2.36
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: string
          Assignee: unassigned at sourceware dot org
          Reporter: goldstein.w.n at gmail dot com
  Target Milestone: ---

Return from loop uses `bsrq` on a register that is potentially zero:
https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/x86_64/strrchr.S;h=50d886713e952e279d73158bf9a08dad93df2be7;hb=HEAD#l157

On AMD this is fine as they defined `bsr`/`bsf` as not changing the destination
if source is zero:
https://www.amd.com/system/files/TechDocs/24594.pdf#page=158

But on Intel this is undefined:
https://www.felixcloutier.com/x86/bsr#:~:text=THEN%0A%20%20%20%20%20%20%20%20ZF%20%E2%86%90%201%3B-,DEST%20is%20undefined,-%3B%0A%20%20%20%20ELSE%0A%20%20%20%20%20%20%20%20ZF%20%E2%86%90%200

On all x86_64 implementations by Intel I know of `bsr` doesn't change the
destination if source is zero and this has worked fine since it was written,
but it could lead to problems in the future if Intel changes there
implementation.

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