[ECOS] nested interrupt

[Hiroyasu Shimizu]

Hi,

I think that current HAL implementation for ARM architecture dose not
take advantage of
FIQ at all so that service of FIQ will be deferred by end of IRQ
services.

	  My original mean is the lowerly priority may be broke when the
high 
	priority interrupt occurs 
	and the register store in __exception_stack by lowerly priority
interrupt 
	may be destoryed

This is no correct in eCos2.0. HAL will disable further FIQ interrupt
when it occurred with in IRQ service context and
just resume  IRQ service execution. After IRQ service end, FIQ will be
enabled so that FIQ will be serviced.

H.Shimizu  
 


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