[PATCH v1 2/2] Support x86 ACE ISA

[Jiang, Haochen]

> From: Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com>
> Sent: Saturday, June 27, 2026 7:54 PM
>

Besides the comments Jan and Lin has given,

> diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
> index d82ed061a78..f6f40589d11 100644
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -1200,6 +1201,7 @@ static const arch_entry cpu_arch[] =
>    SUBARCH (pconfig, PCONFIG, PCONFIG, false),
>    SUBARCH (waitpkg, WAITPKG, WAITPKG, false),
>    SUBARCH (cldemote, CLDEMOTE, CLDEMOTE, false),
> +  SUBARCH (ace, ACE, ACE, false),
>    SUBARCH (amx_int8, AMX_INT8, ANY_AMX_INT8, false),
>    SUBARCH (amx_bf16, AMX_BF16, ANY_AMX_BF16, false),
>    SUBARCH (amx_fp16, AMX_FP16, ANY_AMX_FP16, false),

Should we call it as ACEV1 instead of ACE? Documentation mentioned
it as ACEv1.

> @@ -7498,6 +7503,9 @@ i386_assemble (char *line)
>  	case unsupported_rsp_register:
>  	  err_msg = _("'rsp' register cannot be used");
>  	  break;
> +	case unsupported_tile_index:
> +	  err_msg = _("immediate value must be in range 0-15");
> +	  break;

I also think this might not be needed. If I read the pseudocode correctly,
it will read last 4 bit.

> diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
> index 11cc4ff19dc..dded2d906e6 100644
> --- a/opcodes/i386-gen.c
> +++ b/opcodes/i386-gen.c
> @@ -263,6 +263,8 @@ static const dependency isa_dependencies[] =
>      "RTM|HLE" },
>    { "TSXLDTRK",
>      "RTM" },
> +  { "ACE",
> +    "AVX512F|64" },

I have different opinion on this implication. I suppose it should
directly use AVX10_V2_AUX according to documentation CPUID
emulation part. That part clearly showed AVX10_V2_AUX is a must.

Thx,
Haochen