[PATCH v3] opcodes: Fix BMASKI disassembly for immediate 32 on M*Core
Michal Sobon
msobon@hex-rays.com
Tue Jan 20 15:06:11 GMT 2026
The BMASKI instruction has three encoding variants (OMa, OMb, OMc).
The OMa encoding (0x2C00, mask 0xFFF0) specifically represents
BMASKI with immediate 32, encoded as IMM5=0.
Per Motorola M*Core specification: "An IMM5 value of 0 is interpreted
as a value of 32."
Previously, all three variants extracted the immediate the same way,
causing OMa to incorrectly display 0 instead of 32.
Before: 0x2c04 -> bmaski r4, 0
After: 0x2c04 -> bmaski r4, 32
opcodes/
* mcore-dis.c (print_insn_mcore): Handle OMa encoding to display
immediate 32 instead of 0 for BMASKI.
gas/testsuite/
* gas/mcore/allinsn.s: Add test for bmaski with immediate 32.
Remove padding instructions and fix missing newline at end of file.
* gas/mcore/allinsn.d: Update expected output.
Signed-off-by: Michal Sobon <msobon@hex-rays.com>
---
gas/testsuite/gas/mcore/allinsn.d | 5 +++--
gas/testsuite/gas/mcore/allinsn.s | 4 +---
opcodes/mcore-dis.c | 5 ++++-
3 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/gas/testsuite/gas/mcore/allinsn.d b/gas/testsuite/gas/mcore/allinsn.d
index cf3b0ff6339..388df423448 100644
--- a/gas/testsuite/gas/mcore/allinsn.d
+++ b/gas/testsuite/gas/mcore/allinsn.d
@@ -394,5 +394,6 @@ Disassembly of section \.text:
0+0106 <zexth>:
106: 0164 zexth r4
- 108: 0f00 cmpne r0, r0
- 10a: 0f00 cmpne r0, r0
+
+0+0108 <Bmaski>:
+ 108: 2c04 bmaski r4, 32
diff --git a/gas/testsuite/gas/mcore/allinsn.s b/gas/testsuite/gas/mcore/allinsn.s
index 7f21e514f58..feb7afa4df9 100644
--- a/gas/testsuite/gas/mcore/allinsn.s
+++ b/gas/testsuite/gas/mcore/allinsn.s
@@ -141,6 +141,4 @@ foolit:
test xtrb3 "r1, r13"
test zextb r8
test zexth r4
- clrc // These two instructions pad the object file
- clrc // out to a 16 byte boundary.
-
\ No newline at end of file
+ test Bmaski "r4, 32"
diff --git a/opcodes/mcore-dis.c b/opcodes/mcore-dis.c
index 2cf84270014..a3e7d0b9e95 100644
--- a/opcodes/mcore-dis.c
+++ b/opcodes/mcore-dis.c
@@ -179,12 +179,15 @@ print_insn_mcore (bfd_vma memaddr,
case OBRc:
case SI:
case SIa:
- case OMa:
case OMb:
case OMc:
(*print_func) (stream, "\t%s, %d", name, (inst >> 4) & 0x1F);
break;
+ case OMa:
+ (*print_func) (stream, "\t%s, %d", name, 32);
+ break;
+
case I7:
(*print_func) (stream, "\t%s, %d", name, (inst >> 4) & 0x7F);
break;
--
2.43.0
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