[PATCH] MIPS/GAS: Select symbolic GPR and FPR names based on current ABI setting
Paul Hua
paul.hua.gm@gmail.com
Fri Sep 19 01:52:53 GMT 2025
Maximilian Ciric <max.ciric@gmail.com> writes:
Hi,
Sorry for the delay. LGTM except for some trailing whitespace.
> Add GPR and FPR symbolic register names to GAS for all ABI choices,
> selecting the set of names based on the ABI being assembled for.
>
> This extends the existing feature where the oldabi and newabi would
> provide different symbolic GPR names to the assembler. Both EABIs and
> O64 are now supported along with symbolic FPR names for all ABI choices.
>
> Signed-off-by: Maximilian Ciric <max.ciric@gmail.com>
> ---
> gas/config/tc-mips.c | 282 +++++++++++++++++-
> gas/testsuite/gas/mips/fpr-asm-names-32.d | 41 +++
> gas/testsuite/gas/mips/fpr-asm-names-64.d | 5 +
> gas/testsuite/gas/mips/fpr-asm-names-eabi32.d | 5 +
> gas/testsuite/gas/mips/fpr-asm-names-eabi64.d | 5 +
> gas/testsuite/gas/mips/fpr-asm-names-n32.d | 5 +
> gas/testsuite/gas/mips/fpr-asm-names-o64.d | 5 +
> gas/testsuite/gas/mips/fpr-asm-names.s | 234 +++++++++++++++
> gas/testsuite/gas/mips/gpr-asm-names-32.d | 41 +++
> gas/testsuite/gas/mips/gpr-asm-names-64.d | 5 +
> gas/testsuite/gas/mips/gpr-asm-names-eabi32.d | 5 +
> gas/testsuite/gas/mips/gpr-asm-names-eabi64.d | 5 +
> gas/testsuite/gas/mips/gpr-asm-names-n32.d | 5 +
> gas/testsuite/gas/mips/gpr-asm-names-o64.d | 5 +
> gas/testsuite/gas/mips/gpr-asm-names.s | 82 +++++
> gas/testsuite/gas/mips/mips.exp | 19 ++
> 16 files changed, 734 insertions(+), 15 deletions(-)
> create mode 100644 gas/testsuite/gas/mips/fpr-asm-names-32.d
> create mode 100644 gas/testsuite/gas/mips/fpr-asm-names-64.d
> create mode 100644 gas/testsuite/gas/mips/fpr-asm-names-eabi32.d
> create mode 100644 gas/testsuite/gas/mips/fpr-asm-names-eabi64.d
> create mode 100644 gas/testsuite/gas/mips/fpr-asm-names-n32.d
> create mode 100644 gas/testsuite/gas/mips/fpr-asm-names-o64.d
> create mode 100644 gas/testsuite/gas/mips/fpr-asm-names.s
> create mode 100644 gas/testsuite/gas/mips/gpr-asm-names-32.d
> create mode 100644 gas/testsuite/gas/mips/gpr-asm-names-64.d
> create mode 100644 gas/testsuite/gas/mips/gpr-asm-names-eabi32.d
> create mode 100644 gas/testsuite/gas/mips/gpr-asm-names-eabi64.d
> create mode 100644 gas/testsuite/gas/mips/gpr-asm-names-n32.d
> create mode 100644 gas/testsuite/gas/mips/gpr-asm-names-o64.d
> create mode 100644 gas/testsuite/gas/mips/gpr-asm-names.s
>
> diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
> index d01b6a5ba05..5c1d387a4c5 100644
> --- a/gas/config/tc-mips.c
> +++ b/gas/config/tc-mips.c
> @@ -2794,7 +2794,9 @@ struct regname {
> {"$cc6", RTYPE_FCC | RTYPE_CCC | 6}, \
> {"$cc7", RTYPE_FCC | RTYPE_CCC | 7}
>
trailing whitespace ?
> -#define N32N64_SYMBOLIC_REGISTER_NAMES \
> +/* ABI-specific symbolic register names. */
> +
> +#define N32N64EABI_SYMBOLIC_REGISTER_NAMES \
> {"$a4", RTYPE_GP | 8}, \
> {"$a5", RTYPE_GP | 9}, \
> {"$a6", RTYPE_GP | 10}, \
> @@ -2808,7 +2810,7 @@ struct regname {
> {"$t2", RTYPE_GP | 14}, \
> {"$t3", RTYPE_GP | 15}
>
> -#define O32_SYMBOLIC_REGISTER_NAMES \
> +#define O32O64_SYMBOLIC_REGISTER_NAMES \
> {"$t0", RTYPE_GP | 8}, \
> {"$t1", RTYPE_GP | 9}, \
> {"$t2", RTYPE_GP | 10}, \
> @@ -2822,6 +2824,210 @@ struct regname {
> {"$ta2", RTYPE_GP | 14}, /* alias for $t6 */ \
> {"$ta3", RTYPE_GP | 15} /* alias for $t7 */
>
> +#define O32_SYMBOLIC_FPU_REGISTER_NAMES \
> + {"$fv0", RTYPE_FPU | 0}, \
> + {"$fv0f", RTYPE_FPU | 1}, \
> + {"$fv1", RTYPE_FPU | 2}, \
> + {"$fv1f", RTYPE_FPU | 3}, \
> + {"$ft0", RTYPE_FPU | 4}, \
> + {"$ft0f", RTYPE_FPU | 5}, \
> + {"$ft1", RTYPE_FPU | 6}, \
> + {"$ft1f", RTYPE_FPU | 7}, \
> + {"$ft2", RTYPE_FPU | 8}, \
> + {"$ft2f", RTYPE_FPU | 9}, \
> + {"$ft3", RTYPE_FPU | 10}, \
> + {"$ft3f", RTYPE_FPU | 11}, \
> + {"$fa0", RTYPE_FPU | 12}, \
> + {"$fa0f", RTYPE_FPU | 13}, \
> + {"$fa1", RTYPE_FPU | 14}, \
> + {"$fa1f", RTYPE_FPU | 15}, \
> + {"$ft4", RTYPE_FPU | 16}, \
> + {"$ft4f", RTYPE_FPU | 17}, \
> + {"$ft5", RTYPE_FPU | 18}, \
> + {"$ft5f", RTYPE_FPU | 19}, \
> + {"$fs0", RTYPE_FPU | 20}, \
> + {"$fs0f", RTYPE_FPU | 21}, \
> + {"$fs1", RTYPE_FPU | 22}, \
> + {"$fs1f", RTYPE_FPU | 23}, \
> + {"$fs2", RTYPE_FPU | 24}, \
> + {"$fs2f", RTYPE_FPU | 25}, \
> + {"$fs3", RTYPE_FPU | 26}, \
> + {"$fs3f", RTYPE_FPU | 27}, \
> + {"$fs4", RTYPE_FPU | 28}, \
> + {"$fs4f", RTYPE_FPU | 29}, \
> + {"$fs5", RTYPE_FPU | 30}, \
> + {"$fs5f", RTYPE_FPU | 31}
> +
> +#define O64_SYMBOLIC_FPU_REGISTER_NAMES \
> + {"$fv0", RTYPE_FPU | 0}, \
> + {"$fv1", RTYPE_FPU | 1}, \
> + {"$ft0", RTYPE_FPU | 2}, \
> + {"$ft1", RTYPE_FPU | 3}, \
> + {"$ft2", RTYPE_FPU | 4}, \
> + {"$ft3", RTYPE_FPU | 5}, \
> + {"$ft4", RTYPE_FPU | 6}, \
> + {"$ft5", RTYPE_FPU | 7}, \
> + {"$ft6", RTYPE_FPU | 8}, \
> + {"$ft7", RTYPE_FPU | 9}, \
> + {"$ft8", RTYPE_FPU | 10}, \
> + {"$ft9", RTYPE_FPU | 11}, \
> + {"$fa0", RTYPE_FPU | 12}, \
> + {"$fa1", RTYPE_FPU | 13}, \
> + {"$ft10", RTYPE_FPU | 14}, \
> + {"$ft11", RTYPE_FPU | 15}, \
> + {"$ft12", RTYPE_FPU | 16}, \
> + {"$ft13", RTYPE_FPU | 17}, \
> + {"$ft14", RTYPE_FPU | 18}, \
> + {"$ft15", RTYPE_FPU | 19}, \
> + {"$fs0", RTYPE_FPU | 20}, \
> + {"$fs1", RTYPE_FPU | 21}, \
> + {"$fs2", RTYPE_FPU | 22}, \
> + {"$fs3", RTYPE_FPU | 23}, \
> + {"$fs4", RTYPE_FPU | 24}, \
> + {"$fs5", RTYPE_FPU | 25}, \
> + {"$fs6", RTYPE_FPU | 26}, \
> + {"$fs7", RTYPE_FPU | 27}, \
> + {"$fs8", RTYPE_FPU | 28}, \
> + {"$fs9", RTYPE_FPU | 29}, \
> + {"$fs10", RTYPE_FPU | 30}, \
> + {"$fs11", RTYPE_FPU | 31}
> +
> +#define N32_SYMBOLIC_FPU_REGISTER_NAMES \
> + {"$fv0", RTYPE_FPU | 0}, \
> + {"$ft14", RTYPE_FPU | 1}, \
> + {"$fv1", RTYPE_FPU | 2}, \
> + {"$ft15", RTYPE_FPU | 3}, \
> + {"$ft0", RTYPE_FPU | 4}, \
> + {"$ft1", RTYPE_FPU | 5}, \
> + {"$ft2", RTYPE_FPU | 6}, \
> + {"$ft3", RTYPE_FPU | 7}, \
> + {"$ft4", RTYPE_FPU | 8}, \
> + {"$ft5", RTYPE_FPU | 9}, \
> + {"$ft6", RTYPE_FPU | 10}, \
> + {"$ft7", RTYPE_FPU | 11}, \
> + {"$fa0", RTYPE_FPU | 12}, \
> + {"$fa1", RTYPE_FPU | 13}, \
> + {"$fa2", RTYPE_FPU | 14}, \
> + {"$fa3", RTYPE_FPU | 15}, \
> + {"$fa4", RTYPE_FPU | 16}, \
> + {"$fa5", RTYPE_FPU | 17}, \
> + {"$fa6", RTYPE_FPU | 18}, \
> + {"$fa7", RTYPE_FPU | 19}, \
> + {"$fs0", RTYPE_FPU | 20}, \
> + {"$ft8", RTYPE_FPU | 21}, \
> + {"$fs1", RTYPE_FPU | 22}, \
> + {"$ft9", RTYPE_FPU | 23}, \
> + {"$fs2", RTYPE_FPU | 24}, \
> + {"$ft10", RTYPE_FPU | 25}, \
> + {"$fs3", RTYPE_FPU | 26}, \
> + {"$ft11", RTYPE_FPU | 27}, \
> + {"$fs4", RTYPE_FPU | 28}, \
> + {"$ft12", RTYPE_FPU | 29}, \
> + {"$fs5", RTYPE_FPU | 30}, \
> + {"$ft13", RTYPE_FPU | 31}
> +
> +#define N64_SYMBOLIC_FPU_REGISTER_NAMES \
> + {"$fv0", RTYPE_FPU | 0}, \
> + {"$ft12", RTYPE_FPU | 1}, \
> + {"$fv1", RTYPE_FPU | 2}, \
> + {"$ft13", RTYPE_FPU | 3}, \
> + {"$ft0", RTYPE_FPU | 4}, \
> + {"$ft1", RTYPE_FPU | 5}, \
> + {"$ft2", RTYPE_FPU | 6}, \
> + {"$ft3", RTYPE_FPU | 7}, \
> + {"$ft4", RTYPE_FPU | 8}, \
> + {"$ft5", RTYPE_FPU | 9}, \
> + {"$ft6", RTYPE_FPU | 10}, \
> + {"$ft7", RTYPE_FPU | 11}, \
> + {"$fa0", RTYPE_FPU | 12}, \
> + {"$fa1", RTYPE_FPU | 13}, \
> + {"$fa2", RTYPE_FPU | 14}, \
> + {"$fa3", RTYPE_FPU | 15}, \
> + {"$fa4", RTYPE_FPU | 16}, \
> + {"$fa5", RTYPE_FPU | 17}, \
> + {"$fa6", RTYPE_FPU | 18}, \
> + {"$fa7", RTYPE_FPU | 19}, \
> + {"$ft8", RTYPE_FPU | 20}, \
> + {"$ft9", RTYPE_FPU | 21}, \
> + {"$ft10", RTYPE_FPU | 22}, \
> + {"$ft11", RTYPE_FPU | 23}, \
> + {"$fs0", RTYPE_FPU | 24}, \
> + {"$fs1", RTYPE_FPU | 25}, \
> + {"$fs2", RTYPE_FPU | 26}, \
> + {"$fs3", RTYPE_FPU | 27}, \
> + {"$fs4", RTYPE_FPU | 28}, \
> + {"$fs5", RTYPE_FPU | 29}, \
> + {"$fs6", RTYPE_FPU | 30}, \
> + {"$fs7", RTYPE_FPU | 31}
> +
> +#define EABI32_SYMBOLIC_FPU_REGISTER_NAMES \
> + {"$fv0", RTYPE_FPU | 0}, \
> + {"$fv0f", RTYPE_FPU | 1}, \
> + {"$fv1", RTYPE_FPU | 2}, \
> + {"$fv1f", RTYPE_FPU | 3}, \
> + {"$ft0", RTYPE_FPU | 4}, \
> + {"$ft0f", RTYPE_FPU | 5}, \
> + {"$ft1", RTYPE_FPU | 6}, \
> + {"$ft1f", RTYPE_FPU | 7}, \
> + {"$ft2", RTYPE_FPU | 8}, \
> + {"$ft2f", RTYPE_FPU | 9}, \
> + {"$ft3", RTYPE_FPU | 10}, \
> + {"$ft3f", RTYPE_FPU | 11}, \
> + {"$fa0", RTYPE_FPU | 12}, \
> + {"$fa0f", RTYPE_FPU | 13}, \
> + {"$fa1", RTYPE_FPU | 14}, \
> + {"$fa1f", RTYPE_FPU | 15}, \
> + {"$fa2", RTYPE_FPU | 16}, \
> + {"$fa2f", RTYPE_FPU | 17}, \
> + {"$fa3", RTYPE_FPU | 18}, \
> + {"$fa3f", RTYPE_FPU | 19}, \
> + {"$fs0", RTYPE_FPU | 20}, \
> + {"$fs0f", RTYPE_FPU | 21}, \
> + {"$fs1", RTYPE_FPU | 22}, \
> + {"$fs1f", RTYPE_FPU | 23}, \
> + {"$fs2", RTYPE_FPU | 24}, \
> + {"$fs2f", RTYPE_FPU | 25}, \
> + {"$fs3", RTYPE_FPU | 26}, \
> + {"$fs3f", RTYPE_FPU | 27}, \
> + {"$fs4", RTYPE_FPU | 28}, \
> + {"$fs4f", RTYPE_FPU | 29}, \
> + {"$fs5", RTYPE_FPU | 30}, \
> + {"$fs5f", RTYPE_FPU | 31}
> +
> +#define EABI64_SYMBOLIC_FPU_REGISTER_NAMES \
> + {"$fv0", RTYPE_FPU | 0}, \
> + {"$fv1", RTYPE_FPU | 1}, \
> + {"$ft0", RTYPE_FPU | 2}, \
> + {"$ft1", RTYPE_FPU | 3}, \
> + {"$ft2", RTYPE_FPU | 4}, \
> + {"$ft3", RTYPE_FPU | 5}, \
> + {"$ft4", RTYPE_FPU | 6}, \
> + {"$ft5", RTYPE_FPU | 7}, \
> + {"$ft6", RTYPE_FPU | 8}, \
> + {"$ft7", RTYPE_FPU | 9}, \
> + {"$ft8", RTYPE_FPU | 10}, \
> + {"$ft9", RTYPE_FPU | 11}, \
> + {"$fa0", RTYPE_FPU | 12}, \
> + {"$fa1", RTYPE_FPU | 13}, \
> + {"$fa2", RTYPE_FPU | 14}, \
> + {"$fa3", RTYPE_FPU | 15}, \
> + {"$fa4", RTYPE_FPU | 16}, \
> + {"$fa5", RTYPE_FPU | 17}, \
> + {"$fa6", RTYPE_FPU | 18}, \
> + {"$fa7", RTYPE_FPU | 19}, \
> + {"$fs0", RTYPE_FPU | 20}, \
> + {"$fs1", RTYPE_FPU | 21}, \
> + {"$fs2", RTYPE_FPU | 22}, \
> + {"$fs3", RTYPE_FPU | 23}, \
> + {"$fs4", RTYPE_FPU | 24}, \
> + {"$fs5", RTYPE_FPU | 25}, \
> + {"$fs6", RTYPE_FPU | 26}, \
> + {"$fs7", RTYPE_FPU | 27}, \
> + {"$fs8", RTYPE_FPU | 28}, \
> + {"$fs9", RTYPE_FPU | 29}, \
> + {"$fs10", RTYPE_FPU | 30}, \
> + {"$fs11", RTYPE_FPU | 31}
> +
> /* Remaining symbolic register names. */
> #define SYMBOLIC_REGISTER_NAMES \
> {"$zero", RTYPE_GP | 0}, \
> @@ -2931,12 +3137,38 @@ static const struct regname reg_names[] = {
> };
>
> static const struct regname reg_names_o32[] = {
> - O32_SYMBOLIC_REGISTER_NAMES,
> + O32O64_SYMBOLIC_REGISTER_NAMES,
> + O32_SYMBOLIC_FPU_REGISTER_NAMES,
> + {0, 0}
> +};
> +
> +static const struct regname reg_names_o64[] = {
> + O32O64_SYMBOLIC_REGISTER_NAMES,
> + O64_SYMBOLIC_FPU_REGISTER_NAMES,
> + {0, 0}
> +};
> +
> +static const struct regname reg_names_n32[] = {
> + N32N64EABI_SYMBOLIC_REGISTER_NAMES,
> + N32_SYMBOLIC_FPU_REGISTER_NAMES,
> + {0, 0}
> +};
> +
> +static const struct regname reg_names_n64[] = {
> + N32N64EABI_SYMBOLIC_REGISTER_NAMES,
> + N64_SYMBOLIC_FPU_REGISTER_NAMES,
> + {0, 0}
> +};
> +
> +static const struct regname reg_names_eabi32[] = {
> + N32N64EABI_SYMBOLIC_REGISTER_NAMES,
> + EABI32_SYMBOLIC_FPU_REGISTER_NAMES,
> {0, 0}
> };
>
> -static const struct regname reg_names_n32n64[] = {
> - N32N64_SYMBOLIC_REGISTER_NAMES,
> +static const struct regname reg_names_eabi64[] = {
> + N32N64EABI_SYMBOLIC_REGISTER_NAMES,
> + EABI64_SYMBOLIC_FPU_REGISTER_NAMES,
> {0, 0}
> };
>
> @@ -3681,6 +3913,7 @@ md_begin (void)
> {
> int i = 0;
> int broken = 0;
> + const struct regname *abi_reg_names;
>
> if (mips_pic != NO_PIC)
> {
> @@ -3804,16 +4037,35 @@ md_begin (void)
> symbol_table_insert (symbol_new (reg_names[i].name, reg_section,
> &zero_address_frag,
> reg_names[i].num));
> - if (HAVE_NEWABI)
> - for (i = 0; reg_names_n32n64[i].name; i++)
> - symbol_table_insert (symbol_new (reg_names_n32n64[i].name, reg_section,
> - &zero_address_frag,
> - reg_names_n32n64[i].num));
> - else
> - for (i = 0; reg_names_o32[i].name; i++)
> - symbol_table_insert (symbol_new (reg_names_o32[i].name, reg_section,
> - &zero_address_frag,
> - reg_names_o32[i].num));
> +
> + switch (mips_abi)
> + {
> + case NO_ABI:
> + case O32_ABI:
> + default:
> + abi_reg_names = reg_names_o32;
> + break;
> + case O64_ABI:
> + abi_reg_names = reg_names_o64;
> + break;
> + case N32_ABI:
> + abi_reg_names = reg_names_n32;
> + break;
> + case N64_ABI:
> + abi_reg_names = reg_names_n64;
> + break;
> + case EABI_ABI:
> + if (file_mips_opts.gp == 64)
> + abi_reg_names = reg_names_eabi64;
> + else
> + abi_reg_names = reg_names_eabi32;
> + break;
> + }
> +
> + for (i = 0; abi_reg_names[i].name; i++)
> + symbol_table_insert (symbol_new (abi_reg_names[i].name, reg_section,
> + &zero_address_frag,
> + abi_reg_names[i].num));
>
> for (i = 0; i < 32; i++)
> {
> diff --git a/gas/testsuite/gas/mips/fpr-asm-names-32.d b/gas/testsuite/gas/mips/fpr-asm-names-32.d
> new file mode 100644
> index 00000000000..aa9a111f92f
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/fpr-asm-names-32.d
> @@ -0,0 +1,41 @@
> +#as: -march=mips3 -mabi=32 --defsym MIPS_SIM=1
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=numeric
> +#name: MIPS FPR assembly (o32)
> +#source: fpr-asm-names.s
> +
> +.*: +file format .*mips.*
> +
> +Disassembly of section .text:
> +0+0000 <[^>]*> 44800000 mtc1 \$0,\$f0
> +0+0004 <[^>]*> 44800800 mtc1 \$0,\$f1
> +0+0008 <[^>]*> 44801000 mtc1 \$0,\$f2
> +0+000c <[^>]*> 44801800 mtc1 \$0,\$f3
> +0+0010 <[^>]*> 44802000 mtc1 \$0,\$f4
> +0+0014 <[^>]*> 44802800 mtc1 \$0,\$f5
> +0+0018 <[^>]*> 44803000 mtc1 \$0,\$f6
> +0+001c <[^>]*> 44803800 mtc1 \$0,\$f7
> +0+0020 <[^>]*> 44804000 mtc1 \$0,\$f8
> +0+0024 <[^>]*> 44804800 mtc1 \$0,\$f9
> +0+0028 <[^>]*> 44805000 mtc1 \$0,\$f10
> +0+002c <[^>]*> 44805800 mtc1 \$0,\$f11
> +0+0030 <[^>]*> 44806000 mtc1 \$0,\$f12
> +0+0034 <[^>]*> 44806800 mtc1 \$0,\$f13
> +0+0038 <[^>]*> 44807000 mtc1 \$0,\$f14
> +0+003c <[^>]*> 44807800 mtc1 \$0,\$f15
> +0+0040 <[^>]*> 44808000 mtc1 \$0,\$f16
> +0+0044 <[^>]*> 44808800 mtc1 \$0,\$f17
> +0+0048 <[^>]*> 44809000 mtc1 \$0,\$f18
> +0+004c <[^>]*> 44809800 mtc1 \$0,\$f19
> +0+0050 <[^>]*> 4480a000 mtc1 \$0,\$f20
> +0+0054 <[^>]*> 4480a800 mtc1 \$0,\$f21
> +0+0058 <[^>]*> 4480b000 mtc1 \$0,\$f22
> +0+005c <[^>]*> 4480b800 mtc1 \$0,\$f23
> +0+0060 <[^>]*> 4480c000 mtc1 \$0,\$f24
> +0+0064 <[^>]*> 4480c800 mtc1 \$0,\$f25
> +0+0068 <[^>]*> 4480d000 mtc1 \$0,\$f26
> +0+006c <[^>]*> 4480d800 mtc1 \$0,\$f27
> +0+0070 <[^>]*> 4480e000 mtc1 \$0,\$f28
> +0+0074 <[^>]*> 4480e800 mtc1 \$0,\$f29
> +0+0078 <[^>]*> 4480f000 mtc1 \$0,\$f30
> +0+007c <[^>]*> 4480f800 mtc1 \$0,\$f31
> + \.\.\.
> diff --git a/gas/testsuite/gas/mips/fpr-asm-names-64.d b/gas/testsuite/gas/mips/fpr-asm-names-64.d
> new file mode 100644
> index 00000000000..cfd9e7f0ea9
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/fpr-asm-names-64.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=64 --defsym MIPS_SIM=4
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=numeric
> +#name: MIPS FPR assembly (n64)
> +#source: fpr-asm-names.s
> +#dump: fpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/fpr-asm-names-eabi32.d b/gas/testsuite/gas/mips/fpr-asm-names-eabi32.d
> new file mode 100644
> index 00000000000..516aac1e7ac
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/fpr-asm-names-eabi32.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=eabi -mgp32 -mfp32 --defsym MIPS_SIM=5
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=numeric
> +#name: MIPS FPR assembly (eabi32)
> +#source: fpr-asm-names.s
> +#dump: fpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/fpr-asm-names-eabi64.d b/gas/testsuite/gas/mips/fpr-asm-names-eabi64.d
> new file mode 100644
> index 00000000000..bc2e7a68abc
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/fpr-asm-names-eabi64.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=eabi -mgp64 -mfp64 --defsym MIPS_SIM=6
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=numeric
> +#name: MIPS FPR assembly (eabi64)
> +#source: fpr-asm-names.s
> +#dump: fpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/fpr-asm-names-n32.d b/gas/testsuite/gas/mips/fpr-asm-names-n32.d
> new file mode 100644
> index 00000000000..99d6310783d
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/fpr-asm-names-n32.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=n32 --defsym MIPS_SIM=3
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=numeric
> +#name: MIPS FPR assembly (n32)
> +#source: fpr-asm-names.s
> +#dump: fpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/fpr-asm-names-o64.d b/gas/testsuite/gas/mips/fpr-asm-names-o64.d
> new file mode 100644
> index 00000000000..dacc148df4b
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/fpr-asm-names-o64.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=o64 --defsym MIPS_SIM=2
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=numeric
> +#name: MIPS FPR assembly (o64)
> +#source: fpr-asm-names.s
> +#dump: fpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/fpr-asm-names.s b/gas/testsuite/gas/mips/fpr-asm-names.s
> new file mode 100644
> index 00000000000..b7b55b1ca16
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/fpr-asm-names.s
> @@ -0,0 +1,234 @@
> +# source file to test gas assembling using named FPRs for each ABI choice.
> +
> + .set noreorder
> + .set noat
> +
> + # MIPS_SIM must be set on the command line to one of these.
> + .set ABI_32, 1
> + .set ABI_O64, 2
> + .set ABI_N32, 3
> + .set ABI_64, 4
> + .set ABI_EABI32, 5
> + .set ABI_EABI64, 6
> +
> + .globl text_label .text
> +text_label:
> +
> +.if (MIPS_SIM == ABI_32)
> +
> + mtc1 $0, $fv0
> + mtc1 $0, $fv0f
> + mtc1 $0, $fv1
> + mtc1 $0, $fv1f
> + mtc1 $0, $ft0
> + mtc1 $0, $ft0f
> + mtc1 $0, $ft1
> + mtc1 $0, $ft1f
> + mtc1 $0, $ft2
> + mtc1 $0, $ft2f
> + mtc1 $0, $ft3
> + mtc1 $0, $ft3f
> + mtc1 $0, $fa0
> + mtc1 $0, $fa0f
> + mtc1 $0, $fa1
> + mtc1 $0, $fa1f
> + mtc1 $0, $ft4
> + mtc1 $0, $ft4f
> + mtc1 $0, $ft5
> + mtc1 $0, $ft5f
> + mtc1 $0, $fs0
> + mtc1 $0, $fs0f
> + mtc1 $0, $fs1
> + mtc1 $0, $fs1f
> + mtc1 $0, $fs2
> + mtc1 $0, $fs2f
> + mtc1 $0, $fs3
> + mtc1 $0, $fs3f
> + mtc1 $0, $fs4
> + mtc1 $0, $fs4f
> + mtc1 $0, $fs5
> + mtc1 $0, $fs5f
> +
> +.elseif (MIPS_SIM == ABI_O64)
> +
> + mtc1 $0, $fv0
> + mtc1 $0, $fv1
> + mtc1 $0, $ft0
> + mtc1 $0, $ft1
> + mtc1 $0, $ft2
> + mtc1 $0, $ft3
> + mtc1 $0, $ft4
> + mtc1 $0, $ft5
> + mtc1 $0, $ft6
> + mtc1 $0, $ft7
> + mtc1 $0, $ft8
> + mtc1 $0, $ft9
> + mtc1 $0, $fa0
> + mtc1 $0, $fa1
> + mtc1 $0, $ft10
> + mtc1 $0, $ft11
> + mtc1 $0, $ft12
> + mtc1 $0, $ft13
> + mtc1 $0, $ft14
> + mtc1 $0, $ft15
> + mtc1 $0, $fs0
> + mtc1 $0, $fs1
> + mtc1 $0, $fs2
> + mtc1 $0, $fs3
> + mtc1 $0, $fs4
> + mtc1 $0, $fs5
> + mtc1 $0, $fs6
> + mtc1 $0, $fs7
> + mtc1 $0, $fs8
> + mtc1 $0, $fs9
> + mtc1 $0, $fs10
> + mtc1 $0, $fs11
> +
> +.elseif (MIPS_SIM == ABI_N32)
> +
> + mtc1 $0, $fv0
> + mtc1 $0, $ft14
> + mtc1 $0, $fv1
> + mtc1 $0, $ft15
> + mtc1 $0, $ft0
> + mtc1 $0, $ft1
> + mtc1 $0, $ft2
> + mtc1 $0, $ft3
> + mtc1 $0, $ft4
> + mtc1 $0, $ft5
> + mtc1 $0, $ft6
> + mtc1 $0, $ft7
> + mtc1 $0, $fa0
> + mtc1 $0, $fa1
> + mtc1 $0, $fa2
> + mtc1 $0, $fa3
> + mtc1 $0, $fa4
> + mtc1 $0, $fa5
> + mtc1 $0, $fa6
> + mtc1 $0, $fa7
> + mtc1 $0, $fs0
> + mtc1 $0, $ft8
> + mtc1 $0, $fs1
> + mtc1 $0, $ft9
> + mtc1 $0, $fs2
> + mtc1 $0, $ft10
> + mtc1 $0, $fs3
> + mtc1 $0, $ft11
> + mtc1 $0, $fs4
> + mtc1 $0, $ft12
> + mtc1 $0, $fs5
> + mtc1 $0, $ft13
> +
> +.elseif (MIPS_SIM == ABI_64)
> +
> + mtc1 $0, $fv0
> + mtc1 $0, $ft12
> + mtc1 $0, $fv1
> + mtc1 $0, $ft13
> + mtc1 $0, $ft0
> + mtc1 $0, $ft1
> + mtc1 $0, $ft2
> + mtc1 $0, $ft3
> + mtc1 $0, $ft4
> + mtc1 $0, $ft5
> + mtc1 $0, $ft6
> + mtc1 $0, $ft7
> + mtc1 $0, $fa0
> + mtc1 $0, $fa1
> + mtc1 $0, $fa2
> + mtc1 $0, $fa3
> + mtc1 $0, $fa4
> + mtc1 $0, $fa5
> + mtc1 $0, $fa6
> + mtc1 $0, $fa7
> + mtc1 $0, $ft8
> + mtc1 $0, $ft9
> + mtc1 $0, $ft10
> + mtc1 $0, $ft11
> + mtc1 $0, $fs0
> + mtc1 $0, $fs1
> + mtc1 $0, $fs2
> + mtc1 $0, $fs3
> + mtc1 $0, $fs4
> + mtc1 $0, $fs5
> + mtc1 $0, $fs6
> + mtc1 $0, $fs7
> +
> +.elseif (MIPS_SIM == ABI_EABI32)
> +
> + mtc1 $0, $fv0
> + mtc1 $0, $fv0f
> + mtc1 $0, $fv1
> + mtc1 $0, $fv1f
> + mtc1 $0, $ft0
> + mtc1 $0, $ft0f
> + mtc1 $0, $ft1
> + mtc1 $0, $ft1f
> + mtc1 $0, $ft2
> + mtc1 $0, $ft2f
> + mtc1 $0, $ft3
> + mtc1 $0, $ft3f
> + mtc1 $0, $fa0
> + mtc1 $0, $fa0f
> + mtc1 $0, $fa1
> + mtc1 $0, $fa1f
> + mtc1 $0, $fa2
> + mtc1 $0, $fa2f
> + mtc1 $0, $fa3
> + mtc1 $0, $fa3f
> + mtc1 $0, $fs0
> + mtc1 $0, $fs0f
> + mtc1 $0, $fs1
> + mtc1 $0, $fs1f
> + mtc1 $0, $fs2
> + mtc1 $0, $fs2f
> + mtc1 $0, $fs3
> + mtc1 $0, $fs3f
> + mtc1 $0, $fs4
> + mtc1 $0, $fs4f
> + mtc1 $0, $fs5
> + mtc1 $0, $fs5f
> +
> +.elseif (MIPS_SIM == ABI_EABI64)
> +
> + mtc1 $0, $fv0
> + mtc1 $0, $fv1
> + mtc1 $0, $ft0
> + mtc1 $0, $ft1
> + mtc1 $0, $ft2
> + mtc1 $0, $ft3
> + mtc1 $0, $ft4
> + mtc1 $0, $ft5
> + mtc1 $0, $ft6
> + mtc1 $0, $ft7
> + mtc1 $0, $ft8
> + mtc1 $0, $ft9
> + mtc1 $0, $fa0
> + mtc1 $0, $fa1
> + mtc1 $0, $fa2
> + mtc1 $0, $fa3
> + mtc1 $0, $fa4
> + mtc1 $0, $fa5
> + mtc1 $0, $fa6
> + mtc1 $0, $fa7
> + mtc1 $0, $fs0
> + mtc1 $0, $fs1
> + mtc1 $0, $fs2
> + mtc1 $0, $fs3
> + mtc1 $0, $fs4
> + mtc1 $0, $fs5
> + mtc1 $0, $fs6
> + mtc1 $0, $fs7
> + mtc1 $0, $fs8
> + mtc1 $0, $fs9
> + mtc1 $0, $fs10
> + mtc1 $0, $fs11
> +
> +.else
> +
> + .error "MIPS_SIM unset or bad value"
> +
> +.endif
> +
> +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
> + .space 8
> diff --git a/gas/testsuite/gas/mips/gpr-asm-names-32.d b/gas/testsuite/gas/mips/gpr-asm-names-32.d
> new file mode 100644
> index 00000000000..251098884e9
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/gpr-asm-names-32.d
> @@ -0,0 +1,41 @@
> +#as: -march=mips3 -mabi=32 --defsym OLDABI=1
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
> +#name: MIPS GPR assembly (o32)
> +#source: gpr-asm-names.s
> +
> +.*: +file format .*mips.*
> +
> +Disassembly of section .text:
> +0+0000 <[^>]*> 3c000000 lui \$0,0x0
> +0+0004 <[^>]*> 3c010000 lui \$1,0x0
> +0+0008 <[^>]*> 3c020000 lui \$2,0x0
> +0+000c <[^>]*> 3c030000 lui \$3,0x0
> +0+0010 <[^>]*> 3c040000 lui \$4,0x0
> +0+0014 <[^>]*> 3c050000 lui \$5,0x0
> +0+0018 <[^>]*> 3c060000 lui \$6,0x0
> +0+001c <[^>]*> 3c070000 lui \$7,0x0
> +0+0020 <[^>]*> 3c080000 lui \$8,0x0
> +0+0024 <[^>]*> 3c090000 lui \$9,0x0
> +0+0028 <[^>]*> 3c0a0000 lui \$10,0x0
> +0+002c <[^>]*> 3c0b0000 lui \$11,0x0
> +0+0030 <[^>]*> 3c0c0000 lui \$12,0x0
> +0+0034 <[^>]*> 3c0d0000 lui \$13,0x0
> +0+0038 <[^>]*> 3c0e0000 lui \$14,0x0
> +0+003c <[^>]*> 3c0f0000 lui \$15,0x0
> +0+0040 <[^>]*> 3c100000 lui \$16,0x0
> +0+0044 <[^>]*> 3c110000 lui \$17,0x0
> +0+0048 <[^>]*> 3c120000 lui \$18,0x0
> +0+004c <[^>]*> 3c130000 lui \$19,0x0
> +0+0050 <[^>]*> 3c140000 lui \$20,0x0
> +0+0054 <[^>]*> 3c150000 lui \$21,0x0
> +0+0058 <[^>]*> 3c160000 lui \$22,0x0
> +0+005c <[^>]*> 3c170000 lui \$23,0x0
> +0+0060 <[^>]*> 3c180000 lui \$24,0x0
> +0+0064 <[^>]*> 3c190000 lui \$25,0x0
> +0+0068 <[^>]*> 3c1a0000 lui \$26,0x0
> +0+006c <[^>]*> 3c1b0000 lui \$27,0x0
> +0+0070 <[^>]*> 3c1c0000 lui \$28,0x0
> +0+0074 <[^>]*> 3c1d0000 lui \$29,0x0
> +0+0078 <[^>]*> 3c1e0000 lui \$30,0x0
> +0+007c <[^>]*> 3c1f0000 lui \$31,0x0
> + \.\.\.
> diff --git a/gas/testsuite/gas/mips/gpr-asm-names-64.d b/gas/testsuite/gas/mips/gpr-asm-names-64.d
> new file mode 100644
> index 00000000000..63aaa6e1515
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/gpr-asm-names-64.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=64
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
> +#name: MIPS GPR assembly (n64)
> +#source: gpr-asm-names.s
> +#dump: gpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/gpr-asm-names-eabi32.d b/gas/testsuite/gas/mips/gpr-asm-names-eabi32.d
> new file mode 100644
> index 00000000000..68172b5d1c9
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/gpr-asm-names-eabi32.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=eabi -mgp32 -mfp32
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
> +#name: MIPS GPR assembly (eabi32)
> +#source: gpr-asm-names.s
> +#dump: gpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/gpr-asm-names-eabi64.d b/gas/testsuite/gas/mips/gpr-asm-names-eabi64.d
> new file mode 100644
> index 00000000000..ab99bbe641e
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/gpr-asm-names-eabi64.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=eabi -mgp64 -mfp64
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
> +#name: MIPS GPR assembly (eabi64)
> +#source: gpr-asm-names.s
> +#dump: gpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/gpr-asm-names-n32.d b/gas/testsuite/gas/mips/gpr-asm-names-n32.d
> new file mode 100644
> index 00000000000..b03541b33a5
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/gpr-asm-names-n32.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=n32
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
> +#name: MIPS GPR assembly (n32)
> +#source: gpr-asm-names.s
> +#dump: gpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/gpr-asm-names-o64.d b/gas/testsuite/gas/mips/gpr-asm-names-o64.d
> new file mode 100644
> index 00000000000..7af55db38a7
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/gpr-asm-names-o64.d
> @@ -0,0 +1,5 @@
> +#as: -march=mips3 -mabi=o64 --defsym OLDABI=1
> +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
> +#name: MIPS GPR assembly (o64)
> +#source: gpr-asm-names.s
> +#dump: gpr-asm-names-32.d
> diff --git a/gas/testsuite/gas/mips/gpr-asm-names.s b/gas/testsuite/gas/mips/gpr-asm-names.s
> new file mode 100644
> index 00000000000..c2a61eb425e
> --- /dev/null
> +++ b/gas/testsuite/gas/mips/gpr-asm-names.s
> @@ -0,0 +1,82 @@
> +# source file to test gas assembling using named GPRs for each ABI choice.
> +
> + .set noreorder
> + .set noat
> +
> + .globl text_label .text
> +text_label:
> +
> +.ifdef OLDABI
> +
> + lui $zero, 0
> + lui $at, 0
> + lui $v0, 0
> + lui $v1, 0
> + lui $a0, 0
> + lui $a1, 0
> + lui $a2, 0
> + lui $a3, 0
> + lui $t0, 0
> + lui $t1, 0
> + lui $t2, 0
> + lui $t3, 0
> + lui $t4, 0
> + lui $t5, 0
> + lui $t6, 0
> + lui $t7, 0
> + lui $s0, 0
> + lui $s1, 0
> + lui $s2, 0
> + lui $s3, 0
> + lui $s4, 0
> + lui $s5, 0
> + lui $s6, 0
> + lui $s7, 0
> + lui $t8, 0
> + lui $t9, 0
> + lui $k0, 0
> + lui $k1, 0
> + lui $gp, 0
> + lui $sp, 0
> + lui $s8, 0
> + lui $ra, 0
> +
> +.else
> +
> + lui $zero, 0
> + lui $at, 0
> + lui $v0, 0
> + lui $v1, 0
> + lui $a0, 0
> + lui $a1, 0
> + lui $a2, 0
> + lui $a3, 0
> + lui $a4, 0
> + lui $a5, 0
> + lui $a6, 0
> + lui $a7, 0
> + lui $t0, 0
> + lui $t1, 0
> + lui $t2, 0
> + lui $t3, 0
> + lui $s0, 0
> + lui $s1, 0
> + lui $s2, 0
> + lui $s3, 0
> + lui $s4, 0
> + lui $s5, 0
> + lui $s6, 0
> + lui $s7, 0
> + lui $t8, 0
> + lui $t9, 0
> + lui $k0, 0
> + lui $k1, 0
> + lui $gp, 0
> + lui $sp, 0
> + lui $s8, 0
> + lui $ra, 0
> +
> +.endif
> +
> +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
> + .space 8
> diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
> index 1dace1cac7e..7d7c511fc74 100644
> --- a/gas/testsuite/gas/mips/mips.exp
> +++ b/gas/testsuite/gas/mips/mips.exp
> @@ -1330,6 +1330,25 @@ if { [istarget mips*-*-vxworks*] } {
> run_dump_test "n32-consec"
> }
>
> + # tests assembling named registers based on ABI setting
> + run_dump_test "gpr-asm-names-32"
> + run_dump_test "gpr-asm-names-o64"
> + if $has_newabi {
> + run_dump_test "gpr-asm-names-n32"
> + run_dump_test "gpr-asm-names-64"
> + }
> + run_dump_test "gpr-asm-names-eabi32"
> + run_dump_test "gpr-asm-names-eabi64"
> +
> + run_dump_test "fpr-asm-names-32"
> + run_dump_test "fpr-asm-names-o64"
> + if $has_newabi {
> + run_dump_test "fpr-asm-names-n32"
> + run_dump_test "fpr-asm-names-64"
> + }
> + run_dump_test "fpr-asm-names-eabi32"
> + run_dump_test "fpr-asm-names-eabi64"
> +
> # tests of objdump's ability to disassemble the move mnemonic
> run_dump_test_arches "move" [mips_arch_list_matching mips64 !micromips]
> run_dump_test_arches "micromips32-move" [mips_arch_list_matching micromips]
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