[PATCH 03/11] aarch64: Make spmzr_el0 write-only
Alice Carlotti
alice.carlotti@arm.com
Wed Sep 3 12:34:41 GMT 2025
Remove all test cases that expect spmzr_el0 to be readable, and remove
some redundant default macro values from armv9_5-a-sysregs.s while we're
there.
Add a read of spmzr_el0 to sysreg-diagnostics.s. This turns out to be
the first test for the "reading from a write-only register" note.
Also remove the recently added -menable-sysreg-checking option from this
test, both to simplify the addition of spmzr_el0 to the test, and to
verify that read/write diagnostics don't depend on that option.
diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs-archv9_4-unsupported.l b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs-archv9_4-unsupported.l
index 58e7f9b9c26065d6eecad61a3cda7951cca8e73a..41d89ac281d03cd8a5c5c65ca203dedca487bada 100644
--- a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs-archv9_4-unsupported.l
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs-archv9_4-unsupported.l
@@ -9,9 +9,7 @@
[^ :]+:[0-9]+: Info: macro invoked from here
[^ :]+:[0-9]+: Error: selected processor does not support system register name 'spmzr_el0'
[^ :]+:[0-9]+: Info: macro invoked from here
-[^ :]+:[0-9]+: Error: selected processor does not support system register name 'spmzr_el0'
-[^ :]+:[0-9]+: Info: macro invoked from here
[^ :]+:[0-9]+: Error: selected processor does not support system register name 'mdstepop_el1'
[^ :]+:[0-9]+: Info: macro invoked from here
[^ :]+:[0-9]+: Error: selected processor does not support system register name 'mdstepop_el1'
-[^ :]+:[0-9]+: Info: macro invoked from here
\ No newline at end of file
+[^ :]+:[0-9]+: Info: macro invoked from here
diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.d
index 55a534eaa4c59653167c46939d9c0fa169666869..8c9f49800241955e322aff4cbd42d45616b833c1 100644
--- a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.d
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.d
@@ -12,6 +12,5 @@ Disassembly of section \.text:
.*: d51e5260 msr vsesr_el3, x0
.*: d53e5260 mrs x0, vsesr_el3
.*: d5139c80 msr spmzr_el0, x0
-.*: d5339c80 mrs x0, spmzr_el0
.*: d5100540 msr mdstepop_el1, x0
.*: d5300540 mrs x0, mdstepop_el1
diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.s
index e3ba989c88e6b45672818887c2aa9381206a9413..96e4fde6ce0c1f3d8829620d6f9f218ce5cfde6f 100644
--- a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.s
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.s
@@ -3,11 +3,11 @@
.text
/* Delegated SError exceptions for EL3. */
-rw_sys_reg sys_reg=vdisr_el3 xreg=x0 r=1 w=1
-rw_sys_reg sys_reg=vsesr_el3 xreg=x0 r=1 w=1
+rw_sys_reg vdisr_el3
+rw_sys_reg vsesr_el3
/* System Performance Monitors Extension version 2. */
-rw_sys_reg sys_reg=spmzr_el0 xreg=x0 r=1 w=1
+rw_sys_reg spmzr_el0 r=0
/* Enhanced Software Step Extension. */
-rw_sys_reg sys_reg=mdstepop_el1 xreg=x0 r=1 w=1
+rw_sys_reg mdstepop_el1
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.d
index 35267f578aa0c67132cfd38495ede3bcdba55137..e88d74ee215fcf57e60b881bfb0ca2a08bf18cff 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.d
@@ -1,5 +1,5 @@
#objdump: -dr -M notes
-#as: -menable-sysreg-checking -march=armv8-a
+#as: -march=armv8-a
#warning_output: sysreg-diagnostic.l
.*: file format .*
@@ -14,3 +14,4 @@ Disassembly of section \.text:
.*: d5180003 msr midr_el1, x3 // note: writing to a read-only register
.*: d5180640 msr id_aa64isar2_el1, x0 // note: writing to a read-only register
.*: d5180660 msr id_aa64isar3_el1, x0 // note: writing to a read-only register
+.*: d5339c80 mrs x0, spmzr_el0 // note: reading from a write-only register
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.l b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.l
index df3d3e572a951ae0cc71b4b10cf749bfaa1853db..384f0730d152087f522ec970d0c62b63f7bd44c9 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.l
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.l
@@ -4,3 +4,4 @@
.*:6: Warning: specified register cannot be written to at operand 1 -- `msr midr_el1,x3'
.*:7: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64isar2_el1,x0'
.*:8: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64isar3_el1,x0'
+.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,spmzr_el0'
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.s
index d8e48c682a53f5be7ced056793619c97e9cc94ae..607309576fea2e9fa79dc4bfd53caae77947ca97 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.s
@@ -6,3 +6,4 @@
msr midr_el1, x3
msr id_aa64isar2_el1, x0
msr id_aa64isar3_el1, x0
+ mrs x0, spmzr_el0
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions-bad.l b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions-bad.l
index f70dba97e0d88cdd24b917e48e513a952fbd2f27..415c8a86d1213bd68a6f1d08f3210a378358ccb6 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions-bad.l
+++ b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions-bad.l
@@ -107,8 +107,6 @@
.*: Info: macro invoked from here
.*: Error: selected processor does not support system register name 'spmzr_el0'
.*: Info: macro invoked from here
-.*: Error: selected processor does not support system register name 'spmzr_el0'
-.*: Info: macro invoked from here
.*: Error: selected processor does not support system register name 'mdstepop_el1'
.*: Info: macro invoked from here
.*: Error: selected processor does not support system register name 'mdstepop_el1'
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions.d b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions.d
index f311c23cdae7dcc3c80fb9bea7082125dc14dd40..ac5d172133874d8ec2e64297dfa03102c9cb858e 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions.d
@@ -59,7 +59,6 @@
.*: d51ec120 msr vdisr_el3, x0
.*: d53ec120 mrs x0, vdisr_el3
.*: d5139c80 msr spmzr_el0, x0
-.*: d5339c80 mrs x0, spmzr_el0
.*: d5100540 msr mdstepop_el1, x0
.*: d5300540 mrs x0, mdstepop_el1
.*: d51e21a0 msr gpcbw_el3, x0
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions.s b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions.s
index f5c1138ada1972e32098e6355cd8aeaf8aadf165..89e7388c1dccd2f57be5eb0200d3e7da710d316e 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_no_restrictions.s
@@ -30,7 +30,7 @@
rw_sys_reg pmccntsvr_el1 w=0 // PMUv3_SS
rw_sys_reg vdisr_el3 // E3DES
- rw_sys_reg spmzr_el0 // SPMU2
+ rw_sys_reg spmzr_el0 r=0 // SPMU2
rw_sys_reg mdstepop_el1 // STEP2
rw_sys_reg gpcbw_el3 // V9_5A
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_restrictions.d b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_restrictions.d
index bca119d76f340696cdd059d9f42751a938d35871..38cc6ddc82f21a743a543f8c5d5bf1adb13d4eff 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_restrictions.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_restrictions.d
@@ -59,7 +59,6 @@
.*: d51ec120 msr vdisr_el3, x0
.*: d53ec120 mrs x0, vdisr_el3
.*: d5139c80 msr spmzr_el0, x0
-.*: d5339c80 mrs x0, spmzr_el0
.*: d5100540 msr mdstepop_el1, x0
.*: d5300540 mrs x0, mdstepop_el1
.*: d51e21a0 msr gpcbw_el3, x0
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_restrictions.s b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_restrictions.s
index 0cdb822fdf4a98c059ad1cf2c9b6fc1f0645ab8f..7f95777144b92f012ee53ae86d1ca3b6d0c3c488 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysregs_with_restrictions.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysregs_with_restrictions.s
@@ -49,7 +49,7 @@
.arch armv9.5-a
rw_sys_reg vdisr_el3 // E3DES
- rw_sys_reg spmzr_el0 // SPMU2
+ rw_sys_reg spmzr_el0 r=0 // SPMU2
rw_sys_reg mdstepop_el1 // STEP2
rw_sys_reg gpcbw_el3 // V9_5A
diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index 31ae528a7425b4514472a31fda38f835d312157d..4577b96819cb421c6e8a5a7c00ccfd088a9299d1 100644
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -971,7 +971,7 @@
SYSREG ("spmrootcr_el3", CPENC (2,6,9,14,7), 0, AARCH64_FEATURE (SPMU))
SYSREG ("spmscr_el1", CPENC (2,7,9,14,7), 0, AARCH64_FEATURE (SPMU))
SYSREG ("spmselr_el0", CPENC (2,3,9,12,5), 0, AARCH64_FEATURE (SPMU))
- SYSREG ("spmzr_el0", CPENC (2,3,9,12,4), 0, AARCH64_FEATURE (SPMU2))
+ SYSREG ("spmzr_el0", CPENC (2,3,9,12,4), F_REG_WRITE, AARCH64_FEATURE (SPMU2))
SYSREG ("spsel", CPENC (3,0,4,2,0), 0, AARCH64_NO_FEATURES)
SYSREG ("spsr_abt", CPENC (3,4,4,3,1), 0, AARCH64_NO_FEATURES)
SYSREG ("spsr_el1", CPENC (3,0,4,0,0), 0, AARCH64_NO_FEATURES)
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