Add AMD znver5 RMPREAD instruction

[Kalvakuntla, Umesh]

> Well, for SNP - yes. What about e.g. CLZERO though? That also takes a memory
> operand. Much like the various prefetch insns, just again with addressing limited to
> just (%rax) / (%eax) / (%ax).

The intrinsics in both gcc and clang are taking single operand and are handling the mov of the argument. 
Example assembly:
movq    -40(%rbp), %rax
clzero

So, we think it should be okay for CLZERO as it is currently.

Regards,
Umesh