Add AMD znver5 RMPREAD instruction

[Jan Beulich]

On 22.01.2025 09:09, Jan Beulich wrote:
> On 22.01.2025 08:29, Kalvakuntla, Umesh wrote:
>> What is the right way to specify the constrained register in Modrm operation?
>> Ex: rmpupdate, 0xf20f01fe, SNP&x64, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Acc|Qword }
>> In the above example, using Acc|Reg64 caused error saying Internal error in build_modrm_byte. 
>> But using just Reg64, there was no error in compilation.
>> Should the build_modrm_byte function be updated, or the way we are trying to describe is incorrect?
> 
> There's no true ModR/M byte in this insn; the 0xfe part of the opcode already
> fully specifies what takes the place of the ModR/M byte.
> 
> rmpupdate, 0xf20f01fe, SNP&x64, AddrPrefixOpReg|NoSuf, { RegC|Unspecified, Acc|Qword }
> 
> may be getting closer to what you want (but obviously this is untested). This
> will require adjustments to the AddrPrefixOpReg handling then, or maybe we
> even need an entirely new insn attribute here. I would offer to take a stab,
> yet then I'd first need to have a complete list of insns with their intended
> new operand combinations. Aiui the two
> 
>         rmpread %rax, (%rcx)
>         rmpupdate (%rcx), %rax
> 
> that you had in your earlier mail isn't the complete set.

Hmm, going through all of them, it looks like it's really just these two which
need the new behavior.

Jan