[PATCH v2] aarch64: Add support for new BTI <target> "r".
Alice Carlotti
alice.carlotti@arm.com
Wed Dec 10 20:21:30 GMT 2025
On Mon, Nov 17, 2025 at 10:07:43PM +0000, Srinath Parvathaneni wrote:
> aarch64: Add support for new BTI <target> "r".
No full stop needed in the commit title.
> v1 - > v2:
>
> * Fix the failing test in ld/testsuite.
> ---------------------
>
> Hi,
>
> This patch adds support for new BTI <target> "r" (instruction: bti r),
> which is an alias to "bti" (with no target), for both "bti" and "bti r"
> the preferred disassembly is "bti r". This "bti r" instruction is by
> default available from Armv8-A architecture.
>
> Regression tested for aarch64-none-elf target and found no regressions.
>
> Ok for binutils-master?
>
> Regards,
> Srinath.
> ---
> gas/config/tc-aarch64.c | 2 +-
> gas/testsuite/gas/aarch64/bti.d | 4 +++-
> gas/testsuite/gas/aarch64/bti.s | 2 ++
> gas/testsuite/gas/aarch64/hint-bad.l | 2 +-
> gas/testsuite/gas/aarch64/system.d | 2 +-
> include/opcode/aarch64.h | 1 +
> ld/testsuite/ld-aarch64/protections/bti-far-opt.d | 2 +-
> opcodes/aarch64-opc-2.c | 2 +-
> opcodes/aarch64-opc.c | 5 ++++-
> opcodes/aarch64-tbl.h | 2 +-
> 10 files changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
> index 0ca54c3bd40..04e4a1d89d6 100644
> --- a/gas/config/tc-aarch64.c
> +++ b/gas/config/tc-aarch64.c
> @@ -4619,7 +4619,7 @@ parse_hint_opt (const char *name, char **str,
> && o->value != HINT_OPD_CSYNC)
> || ((strcmp ("bti", name) == 0)
> && (o->value != HINT_OPD_C && o->value != HINT_OPD_J
> - && o->value != HINT_OPD_JC))
> + && o->value != HINT_OPD_JC && o->value != HINT_OPD_R))
> || ((strcmp ("stshh", name) == 0)
> && (o->value != HINT_OPD_KEEP && o->value != HINT_OPD_STRM)))
> return false;
> diff --git a/gas/testsuite/gas/aarch64/bti.d b/gas/testsuite/gas/aarch64/bti.d
> index 434efa32cde..4312cfab62e 100644
> --- a/gas/testsuite/gas/aarch64/bti.d
> +++ b/gas/testsuite/gas/aarch64/bti.d
> @@ -6,10 +6,12 @@
> Disassembly of section \.text:
>
> 0+ <.*>:
> -.*: d503241f bti
> +.*: d503241f bti r
> +.*: d503241f bti r
> .*: d503245f bti c
> .*: d503249f bti j
> .*: d50324df bti jc
> +.*: d503241f bti r
> .*: d503245f bti c
> .*: d503249f bti j
> .*: d50324df bti jc
> diff --git a/gas/testsuite/gas/aarch64/bti.s b/gas/testsuite/gas/aarch64/bti.s
> index 528447b4623..70d68c93fe2 100644
> --- a/gas/testsuite/gas/aarch64/bti.s
> +++ b/gas/testsuite/gas/aarch64/bti.s
> @@ -3,10 +3,12 @@
> .text
>
> bti
> + bti r
> bti c
> bti j
> bti jc
>
> + bti R
> bti C
> bti J
> bti JC
> diff --git a/gas/testsuite/gas/aarch64/hint-bad.l b/gas/testsuite/gas/aarch64/hint-bad.l
> index 57caed10e9a..7017c68d29d 100644
> --- a/gas/testsuite/gas/aarch64/hint-bad.l
> +++ b/gas/testsuite/gas/aarch64/hint-bad.l
> @@ -5,4 +5,4 @@
> [^ :]+:[0-9]+: Error: operand 1 must be the PSB/TSB option name CSYNC -- `psb dsync'
> [^ :]+:[0-9]+: Error: operand 1 must be the PSB/TSB option name CSYNC -- `tsb'
> [^ :]+:[0-9]+: Error: operand 1 must be the PSB/TSB option name CSYNC -- `tsb dsync'
> -[^ :]+:[0-9]+: Error: operand 1 must be BTI targets j/c/jc -- `bti jj'
> +[^ :]+:[0-9]+: Error: operand 1 must be BTI targets r/j/c/jc -- `bti jj'
> diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d
> index ee84793d761..6d90420d539 100644
> --- a/gas/testsuite/gas/aarch64/system.d
> +++ b/gas/testsuite/gas/aarch64/system.d
> @@ -50,7 +50,7 @@ Disassembly of section \.text:
> .*: d50323bf (hint #0x1d|autiasp)
> .*: d50323df (hint #0x1e|autibz)
> .*: d50323ff (hint #0x1f|autibsp)
> -.*: d503241f (hint #0x20|bti)
> +.*: d503241f (hint #0x20|bti r)
> .*: d503243f hint #0x21
> .*: d503245f (hint #0x22|bti c)
> .*: d503247f hint #0x23
> diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
> index e65b61c3f9c..b5723bc9471 100644
> --- a/include/opcode/aarch64.h
> +++ b/include/opcode/aarch64.h
> @@ -1854,6 +1854,7 @@ struct aarch64_inst
> /* Defining the HINT #imm values for the aarch64_hint_options. */
> #define HINT_OPD_CSYNC 0x11
> #define HINT_OPD_DSYNC 0x13
> +#define HINT_OPD_R 0x20
> #define HINT_OPD_C 0x22
> #define HINT_OPD_J 0x24
> #define HINT_OPD_JC 0x26
> diff --git a/ld/testsuite/ld-aarch64/protections/bti-far-opt.d b/ld/testsuite/ld-aarch64/protections/bti-far-opt.d
> index f5038c0cb72..ce202815c9a 100644
> --- a/ld/testsuite/ld-aarch64/protections/bti-far-opt.d
> +++ b/ld/testsuite/ld-aarch64/protections/bti-far-opt.d
> @@ -43,7 +43,7 @@ Disassembly of section \.text:
> 2000c: d503201f nop
>
> 0000000000020010 <baz_bti_>:
> - 20010: d503241f bti
> + 20010: d503241f bti r
>
> 0000000000020014 <baz_bti_c>:
> 20014: d503245f bti c
> diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
> index 7f3b25eae38..f88bc2d9a03 100644
> --- a/opcodes/aarch64-opc-2.c
> +++ b/opcodes/aarch64-opc-2.c
> @@ -149,7 +149,7 @@ const struct aarch64_operand aarch64_operands[] =
> {AARCH64_OPND_CLASS_SYSTEM, "RPRFMOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm1_15, FLD_imm2_12, FLD_imm3_0}, "a range prefetch operation specifier"},
> {AARCH64_OPND_CLASS_SYSTEM, "BARRIER_PSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the PSB/TSB option name CSYNC"},
> {AARCH64_OPND_CLASS_SYSTEM, "BARRIER_GCSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the GCSB option name DSYNC"},
> - {AARCH64_OPND_CLASS_SYSTEM, "BTI_TARGET", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "BTI targets j/c/jc"},
> + {AARCH64_OPND_CLASS_SYSTEM, "BTI_TARGET", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "BTI targets r/j/c/jc"},
> {AARCH64_OPND_CLASS_SYSTEM, "STSHH_POLICY", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an STSHH policy (keep/strm)"},
> {AARCH64_OPND_CLASS_SYSTEM, "BRBOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_brbop}, "Branch Record Buffer operation operand"},
> {AARCH64_OPND_CLASS_INT_REG, "Rt_IN_SYS_ALIASES", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rt}, "Rt register with defaults for SYS aliases"},
> diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
> index b074765920e..18cfb50d16e 100644
> --- a/opcodes/aarch64-opc.c
> +++ b/opcodes/aarch64-opc.c
> @@ -600,6 +600,7 @@ const struct aarch64_name_value_pair aarch64_hint_options[] =
> { " ", HINT_ENCODE (HINT_OPD_F_NOPRINT, 0x20) },
I think you can now remove this line and replace in with the new line for "r".
> { "csync", HINT_OPD_CSYNC }, /* PSB CSYNC. */
> { "dsync", HINT_OPD_DSYNC }, /* GCSB DSYNC. */
> + { "r", HINT_OPD_R }, /* BTI R. */
> { "c", HINT_OPD_C }, /* BTI C. */
> { "j", HINT_OPD_J }, /* BTI J. */
> { "jc", HINT_OPD_JC }, /* BTI JC. */
> @@ -5146,7 +5147,9 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
> break;
>
> case AARCH64_OPND_BTI_TARGET:
> - if ((HINT_FLAG (opnd->hint_option->value) & HINT_OPD_F_NOPRINT) == 0)
> + if ((HINT_FLAG (opnd->hint_option->value) & HINT_OPD_F_NOPRINT) != 0)
> + snprintf (buf, size, "%s", style_sub_mnem (styler, "r"));
> + else
With the entry for " " removed, this if condition can be entirely removed.
That also removes the only uses of HINT_OPD_F_NOPRINT, so that defintion can be
deleted as well.
Thanks,
Alice
> snprintf (buf, size, "%s",
> style_sub_mnem (styler, opnd->hint_option->name));
> break;
> diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
> index 2fc69c27791..ddafe77cb8a 100644
> --- a/opcodes/aarch64-tbl.h
> +++ b/opcodes/aarch64-tbl.h
> @@ -7978,7 +7978,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
> Y(SYSTEM, none, "BARRIER_GCSB", 0, F (), \
> "the GCSB option name DSYNC") \
> Y(SYSTEM, hint, "BTI_TARGET", 0, F (), \
> - "BTI targets j/c/jc") \
> + "BTI targets r/j/c/jc") \
> Y(SYSTEM, hint, "STSHH_POLICY", 0, F(), \
> "an STSHH policy (keep/strm)") \
> Y(SYSTEM, imm, "BRBOP", 0, F(FLD_brbop), \
> --
> 2.25.1
>
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