[RFC] RISC-V: Support Zvabd extension instructions.

Jan Beulich jbeulich@suse.com
Mon Aug 18 12:16:33 GMT 2025


On 18.08.2025 13:29, Jiawei wrote:
> This patch supports Zvabd extension instructions:
> https://github.com/riscv/integer-vector-absolute-difference

Where in that repo, which looks to simply be a clone that's behind its origin,
is this new extension documented? For example, there's no src/Zvabd.adoc.

> --- a/opcodes/riscv-opc.c
> +++ b/opcodes/riscv-opc.c
> @@ -2260,6 +2260,13 @@ const struct riscv_opcode riscv_opcodes[] =
>  {"vsm3c.vi",     0, INSN_CLASS_ZVKSH, "Vd,Vt,Vj", MATCH_VSM3C_VI, MASK_VSM3C_VI, match_opcode, 0},
>  {"vsm3me.vv",    0, INSN_CLASS_ZVKSH, "Vd,Vt,Vs", MATCH_VSM3ME_VV, MASK_VSM3ME_VV, match_opcode, 0},
>  
> +/* Zvabd instructions.  */
> +{"vabs.v",       0, INSN_CLASS_ZVABD, "Vd,VtVm", MATCH_VABS_V, MASK_VABS_V, match_opcode, 0},
> +{"vabd.vv",      0, INSN_CLASS_ZVABD, "Vd,Vt,VsVm", MATCH_VABD_VV, MASK_VABD_VV, match_opcode, 0},
> +{"vabdu.vv",     0, INSN_CLASS_ZVABD, "Vd,Vt,VsVm", MATCH_VABDU_VV, MASK_VABDU_VV, match_opcode, 0},
> +{"vwabdacc.vv",      0, INSN_CLASS_ZVABD, "Vd,Vt,VsVm", MATCH_VWABDACC_VV, MASK_VWABDACC_VV, match_opcode, 0},
> +{"vwabdaccu.vv",     0, INSN_CLASS_ZVABD, "Vd,Vt,VsVm", MATCH_VWABDACCU_VV, MASK_VWABDACCU_VV, match_opcode, 0},

There looks to be a blank padding issue on the last two of these new lines.

Jan


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