[PATCH 2/2] s390: Relax risbg[n]z, risb{h|l}gz, {rns|ros|rxs}bgt operand constraints

[Andreas Krebbel]

On 7/12/24 16:11, Jens Remus wrote:
> This leverages commit ("s390: Simplify (dis)assembly of insn operands
> with const bits") to relax the operand constraints of the immediate
> operand that contains the constant Z- or T-bit of the following extended
> mnemonics:
> risbgz, risbgnz, risbhgz, risblgz, rnsbgt, rosbgt, rxsbgt
>
> Previously those instructions were the only ones where the assembler
> on s390 restricted the specification of the subject I3/I4 operand values
> exactly according to their specification to an unsigned 6- or 5-bit
> unsigned integer. For any other instructions the assembler allows to
> specify any operand value allowed by the instruction format, regardless
> of whether the instruction specification is more restrictive.
>
> Allow to specify the subject I3/I4 operand as unsigned 8-bit integer
> with the constant operand bits being ORed during assembly.
> Relax the instructions subject significant operand bit masks to only
> consider the Z/T-bit as significant, so that the instructions get
> disassembled as their *z or *t flavor regardless of whether any reserved
> bits are set in addition to the Z/T-bit.
> Adapt the rnsbg, rosbg, and rxsbg test cases not to inadvertently set
> the T-bit in operand I3, as they otherwise get disassembled as their
> rnsbgt, rosbgt, and rxsbgt counterpart.
>
> This aligns GNU Assembler to LLVM Assembler.
>
> opcodes/
> 	* s390-opc.c (U6_18, U5_27, U6_26): Remove.
> 	(INSTR_RIE_RRUUU2, INSTR_RIE_RRUUU3, INSTR_RIE_RRUUU4): Define
> 	as INSTR_RIE_RRUUU while retaining insn fmt mask.
> 	(MASK_RIE_RRUUU2, MASK_RIE_RRUUU3, MASK_RIE_RRUUU4): Treat only
> 	Z/T-bit of I3/I4 operand as significant.
>
> gas/testsuite/
> 	* gas/s390/zarch-z10.s (rnsbg, rosbg, rxsbg): Do not set T-bit.

Ok. Thanks!


Andreas