[PATCH] Support Intel AVX10.2 media instructions

Jiang, Haochen haochen.jiang@intel.com
Mon Sep 2 07:14:32 GMT 2024


> From: Jiang, Haochen
> Sent: Monday, September 2, 2024 3:12 PM
> 
> > From: Jan Beulich <jbeulich@suse.com>
> > Sent: Friday, August 30, 2024 8:53 PM
> >
> > On 29.08.2024 09:16, Haochen Jiang wrote:
> > > --- /dev/null
> > > +++ b/gas/testsuite/gas/i386/avx10_2-256-1.s
> > > @@ -0,0 +1,140 @@
> > > +# Check 32bit AVX10.2/256 instructions
> > > +
> > > +	.arch generic32
> > > +	.arch .avx10.2/256
> > > +	.text
> > > +_start:
> > > +	.irp m, ss, su, uu
> > > +	vpdpb\m\()d	%ymm4, %ymm5, %ymm6{%k7}
> > > +	vpdpb\m\()d	%xmm4, %xmm5, %xmm6{%k7}
> > > +	vpdpb\m\()d	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
> > > +	vpdpb\m\()d	(%ecx){1to8}, %ymm5, %ymm6
> > > +	vpdpb\m\()d	4064(%ecx), %ymm5, %ymm6{%k7}
> > > +	vpdpb\m\()d	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
> > > +	vpdpb\m\()d	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
> > > +	vpdpb\m\()d	(%ecx){1to4}, %xmm5, %xmm6
> > > +	vpdpb\m\()d	2032(%ecx), %xmm5, %xmm6{%k7}
> > > +	vpdpb\m\()d	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
> > > +	vpdpb\m\()ds	%ymm4, %ymm5, %ymm6{%k7}
> > > +	vpdpb\m\()ds	%xmm4, %xmm5, %xmm6{%k7}
> > > +	vpdpb\m\()ds	0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7}
> > > +	vpdpb\m\()ds	(%ecx){1to8}, %ymm5, %ymm6
> > > +	vpdpb\m\()ds	4064(%ecx), %ymm5, %ymm6{%k7}
> > > +	vpdpb\m\()ds	-512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
> > > +	vpdpb\m\()ds	0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
> > > +	vpdpb\m\()ds	(%ecx){1to4}, %xmm5, %xmm6
> > > +	vpdpb\m\()ds	2032(%ecx), %xmm5, %xmm6{%k7}
> > > +	vpdpb\m\()ds	-512(%edx){1to4}, %xmm5, %xmm6{%k7}{z}
> > > +	.endr
> >
> > The 2nd half is fully redundant with the 1st, except for the trailing s.
> > Use a 2nd, nested .irp?
> 
> I am not sure if it could be done with .irp, n, ,s or something similar.
> I will have a try.
> 

After I sent that out, I immediately found that we could use .irp n, d, ds
to get that. I will change to that.

Thx,
Haochen



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