[PATCH][v5] Support Intel USER_MSR
Jan Beulich
jbeulich@suse.com
Mon Oct 30 08:31:05 GMT 2023
On 30.10.2023 06:50, Hu, Lin1 wrote:
>>> @@ -5232,8 +5244,23 @@ md_assemble (char *line)
>>> && (t->mnem_off == MN_extrq || t->mnem_off == MN_insertq))
>>> swap_2_operands (0, 1);
>>
>> Did you, btw, consider extending this to cater for UWRMSR as well, in place of
>> the new construct at the bottom of match_template()? (I'm not saying it needs
>> to be that way; if you decide to leave things as is, I may later see about folding
>> both.)
>>
>
> For this part, my current changes are
>
> @@ -5400,6 +5388,38 @@ md_assemble (char *line)
> return;
> }
>
> + /* The order of the immediates should be reversed
> + for 2 immediates extrq and insertq instructions.
> + And This pattern aims to put the unusually placed imm operand to a usual
> + place. The constraints are currently only adapted to uwrmsr, and may
> + need further tweaking when new similar instructions become available. */
> + if (i.imm_operands && i.imm_operands < i.operands
> + && ((t->mnem_off == MN_extrq || t->mnem_off == MN_insertq)
> + || operand_type_check (i.tm.operand_types[1], imm)))
> + {
> + i386_operand_type tmp_operand_type = i.tm.operand_types[0];
> + i.tm.operand_types[0] = i.tm.operand_types[1];
> + i.tm.operand_types[1] = tmp_operand_type;
> + swap_2_operands(0, 1);
> + }
>
> after match_template. Some generalization has been reduced to save on code size.
> What's your opinion?
Hmm, why this way, rather than indeed merely extending (without moving)
what's there? (Anyway, as said, I'm not going to insist on this folding;
if you don't want to deal with that right here, I'll see to make a
follow-on change later.)
Jan
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