[PATCH][v5] Support Intel USER_MSR

[Hu, Lin1]

> > @@ -5232,8 +5244,23 @@ md_assemble (char *line)
> >        && (t->mnem_off == MN_extrq || t->mnem_off == MN_insertq))
> >        swap_2_operands (0, 1);
> 
> Did you, btw, consider extending this to cater for UWRMSR as well, in place of
> the new construct at the bottom of match_template()? (I'm not saying it needs
> to be that way; if you decide to leave things as is, I may later see about folding
> both.)
>

For this part, my current changes are

@@ -5400,6 +5388,38 @@ md_assemble (char *line)
       return;
     }

+  /* The order of the immediates should be reversed
+     for 2 immediates extrq and insertq instructions.
+     And This pattern aims to put the unusually placed imm operand to a usual
+     place. The constraints are currently only adapted to uwrmsr, and may
+     need further tweaking when new similar instructions become available.  */
+  if (i.imm_operands && i.imm_operands < i.operands
+      && ((t->mnem_off == MN_extrq || t->mnem_off == MN_insertq)
+         || operand_type_check (i.tm.operand_types[1], imm)))
+    {
+      i386_operand_type tmp_operand_type = i.tm.operand_types[0];
+      i.tm.operand_types[0] = i.tm.operand_types[1];
+      i.tm.operand_types[1] = tmp_operand_type;
+      swap_2_operands(0, 1);
+    }

after match_template. Some generalization has been reduced to save on code size.
What's your opinion?

For the other comments, I've made changes as mentioned.

BRs,
Lin