[REVIEW ONLY 3/3] MOCK: RISC-V: Tests for 'Zce' implications

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

**NEVER COMMIT THIS.**

This commit is intended to be merged to the previous patch once 'Zcmp'
and 'Zcmt' extensions are ready.

It adds several tests related to 'Zce' implications.

bfd/ChangeLog:

	* elfxx-riscv.c: [MOCK] Uncomment mock lines to pass the test.

gas/ChangeLog:

	* testsuite/gas/riscv/march-imply-zce.d: New test.
	* testsuite/gas/riscv/march-imply-zce-f-32.d: Likewise.
	* testsuite/gas/riscv/march-imply-zce-f-64.d: Likewise.
---
 bfd/elfxx-riscv.c                              | 7 +++----
 gas/testsuite/gas/riscv/march-imply-zce-f-32.d | 6 ++++++
 gas/testsuite/gas/riscv/march-imply-zce-f-64.d | 6 ++++++
 gas/testsuite/gas/riscv/march-imply-zce.d      | 6 ++++++
 4 files changed, 21 insertions(+), 4 deletions(-)
 create mode 100644 gas/testsuite/gas/riscv/march-imply-zce-f-32.d
 create mode 100644 gas/testsuite/gas/riscv/march-imply-zce-f-64.d
 create mode 100644 gas/testsuite/gas/riscv/march-imply-zce.d

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 94487306fae5..583a10c2794b 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1346,10 +1346,9 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
   {"zcb",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zcf",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {"zcd",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
-  /* MOCK: uncomment those lines once ready.  */
-  // {"zce",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
-  // {"zcmp",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
-  // {"zcmt",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zce",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zcmp",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
+  {"zcmt",		ISA_SPEC_CLASS_DRAFT,		1, 0,  0 },
   {NULL, 0, 0, 0, 0}
 };
 
diff --git a/gas/testsuite/gas/riscv/march-imply-zce-f-32.d b/gas/testsuite/gas/riscv/march-imply-zce-f-32.d
new file mode 100644
index 000000000000..e0cca82e0a08
--- /dev/null
+++ b/gas/testsuite/gas/riscv/march-imply-zce-f-32.d
@@ -0,0 +1,6 @@
+#as: -march=rv32if_zce -march-attr -misa-spec=20191213
+#readelf: -A
+#source: empty.s
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: "rv32i2p1_f2p2_zicsr2p0_zca1p0_zcb1p0_zce1p0_zcf1p0_zcmp1p0_zcmt1p0"
diff --git a/gas/testsuite/gas/riscv/march-imply-zce-f-64.d b/gas/testsuite/gas/riscv/march-imply-zce-f-64.d
new file mode 100644
index 000000000000..f0ccd7a3fce5
--- /dev/null
+++ b/gas/testsuite/gas/riscv/march-imply-zce-f-64.d
@@ -0,0 +1,6 @@
+#as: -march=rv64if_zce -march-attr -misa-spec=20191213
+#readelf: -A
+#source: empty.s
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: "rv64i2p1_f2p2_zicsr2p0_zca1p0_zcb1p0_zce1p0_zcmp1p0_zcmt1p0"
diff --git a/gas/testsuite/gas/riscv/march-imply-zce.d b/gas/testsuite/gas/riscv/march-imply-zce.d
new file mode 100644
index 000000000000..2a4ab4e1b639
--- /dev/null
+++ b/gas/testsuite/gas/riscv/march-imply-zce.d
@@ -0,0 +1,6 @@
+#as: -march=rv32i_zce -march-attr -misa-spec=20191213
+#readelf: -A
+#source: empty.s
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: "rv32i2p1_zca1p0_zcb1p0_zce1p0_zcmp1p0_zcmt1p0"
-- 
2.41.0