[PATCH v2 5/7] RISC-V: relax post-relocation-operator separator expectation

[Nelson Chu]

Sorry for missing this one.  No, not a request.  I'm fine with both, since
this patch won't break the risc-gnu-toolchain regression, so most of the
stuff already used looks good.  It seems that the risc v-asm doesn't say we
"must '' use a parenthesis after the modifiers, it just shows examples that
all use it.

Thanks
Nelson

On Tue, Apr 25, 2023 at 4:52 PM Jan Beulich <jbeulich@suse.com> wrote:

> On 25.04.2023 10:44, Nelson Chu wrote:
> > Thanks for the information, Andreas.  The riscv-asm should be the right
> > place to see the expected behaviors, and discuss the related stuff :-)
>
> Just to clarify: Is this a request to replace this patch by one insisting
> on the use of a parenthesis? If so, I can certainly do that, and commit
> only the remaining patches (as per your other reply).
>
> Jan
>
> > On Tue, Apr 25, 2023 at 4:37 PM Andreas Schwab <schwab@linux-m68k.org>
> > wrote:
> >
> >> On Mär 10 2023, Jan Beulich via Binutils wrote:
> >>
> >>> With a blank being okay as a separator, constructs like
> >>>
> >>>       lui     t0, %hi sym
> >>>       lui     t0, %hi 0x1000
> >>>
> >>> are accepted. But then it makes little sense to not also accept e.g.
> >>>
> >>>       lui     t0, %hi +sym
> >>>       lui     t0, %hi -0x1000
> >>
> >>
> https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md
> >> always includes the parens around the expression, and I don't think it
> >> should be accepted without them.
> >>
> >> --
> >> Andreas Schwab, schwab@linux-m68k.org
> >> GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510  2552 DF73 E780 A9DA AEC1
> >> "And now for something completely different."
> >>
> >
>
>