[PATCH v2 0/1] RISC-V: Add `OP_V' to .insn named opcodes

Tsukasa OI research_trasio@irq.a4lg.com
Thu Jul 28 13:02:04 GMT 2022


Hello,

This small patch adds OP_V to named opcode list for .insn directive.

Changes (v1 -> v2):
-   Rebase
-   Add testcase


Tracker on GitHub:
<https://github.com/a4lg/binutils-gdb/wiki/riscv_gas_insn_opv>

    Sidenote:
    I started listing my Binutils submissions on my GitHub Wiki:
    <https://github.com/a4lg/binutils-gdb/wiki/Patch-Queue>
    hoping that current status and conflicting patches are clear.


OP-V (0x57) is an opcode for vector instructions (defined on now
ratified V extension).  It adds OP_V to named constants of .insn directive
(note that replacing - with _ is standard on GNU Binutils' .insn).

Although vector instruction encoding is not implemented in .insn directive,
it will help future implementation of custom vector .insn.

If Zp* extensions are ratified, we could add OP_P (0x77) likewise.


Thanks,
Tsukasa




Tsukasa OI (1):
  RISC-V: Add `OP_V' to .insn named opcodes

 gas/config/tc-riscv.c                |  2 +-
 gas/testsuite/gas/riscv/insn-dwarf.d | 17 +++++++++--------
 gas/testsuite/gas/riscv/insn.d       |  3 ++-
 gas/testsuite/gas/riscv/insn.s       |  2 ++
 4 files changed, 14 insertions(+), 10 deletions(-)


base-commit: 2eb132bdfb915c9721294871ce857c4dad522ce1
-- 
2.34.1



More information about the Binutils mailing list