[PATCH v2 3/8] RISC-V: Add Zfhmin/Zhinxmin (with refactoring)
Kito Cheng
kito.cheng@gmail.com
Tue Jul 5 14:21:35 GMT 2022
> +{"fmv.h", 0, INSN_CLASS_ZFH_OR_ZHINX, "D,U", MATCH_FSGNJ_H, MASK_FSGNJ_H, match_rs1_eq_rs2, INSN_ALIAS },
Maybe we need one more alias for ZFHMIN? like this: {"fmv.h", 0,
INSN_CLASS_ZFHMIN, "D,U", MATCH_FSGNJ_S, MASK_FSGNJ_S,
match_rs1_eq_rs2, INSN_ALIAS },
---
Spec say:
Zfhmin does not include the FSGNJ.H instruction, because it suffices to
instead use the FSGNJ.S instruction to move half-precision values between
floating-point registers.
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