[PATCH 2/4] PR28824, relro security issues, x86 keep COMMONPAGESIZE relro
Alan Modra
amodra@gmail.com
Mon Feb 14 02:18:12 GMT 2022
On Tue, Feb 08, 2022 at 11:38:31AM +1030, Alan Modra wrote:
> x86 treats MAXPAGESIZE as a memory optimisation parameter, actual
> hardware paging is always COMMPAGESIZE of 4k. Use COMMONPAGESIZE for
> the end of the relro segment alignment.
HJ, you may like to revert this patch and make x86 also align the end
of the relro segment to MAXPAGESIZE. That's why I extracted this part
into a separate patch. I'm not anywhere near 100% sure about my claim
that x86 always uses (or can use) 4k hardware memory pages.
--
Alan Modra
Australia Development Lab, IBM
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