[PATCH 2/4] RISC-V: Add disassembler tests for Zdinx regs

[Palmer Dabbelt]

On Tue, 01 Feb 2022 05:53:36 PST (-0800), binutils@sourceware.org wrote:
> This commid adds disassembler tests for invalid Zdinx register numbers
> (make sure that we don't disassemble invalid encodings).
>
> gas/ChangeLog:
>
> 	* testsuite/gas/riscv/zdinx-32-regpair-dis.s: New test to make
> 	sure that invalid encoding is not disassembled.
> 	* testsuite/gas/riscv/zdinx-32-regpair-dis.d: Likewise.
> ---
>  gas/testsuite/gas/riscv/zdinx-32-regpair-dis.d | 11 +++++++++++
>  gas/testsuite/gas/riscv/zdinx-32-regpair-dis.s |  5 +++++
>  2 files changed, 16 insertions(+)
>  create mode 100644 gas/testsuite/gas/riscv/zdinx-32-regpair-dis.d
>  create mode 100644 gas/testsuite/gas/riscv/zdinx-32-regpair-dis.s
>
> diff --git a/gas/testsuite/gas/riscv/zdinx-32-regpair-dis.d b/gas/testsuite/gas/riscv/zdinx-32-regpair-dis.d
> new file mode 100644
> index 00000000000..018a0e51f03
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/zdinx-32-regpair-dis.d
> @@ -0,0 +1,11 @@
> +#as: -march=rv32ima_zdinx
> +#source: zdinx-32-regpair-dis.s
> +#objdump: -dr -Mnumeric
> +
> +.*:[ 	]+file format .*
> +
> +Disassembly of section .text:
> +
> +0+000 <target>:
> +[ 	]+[0-9a-f]+:[ 	]+02627153[ 	]+fadd.d[ 	]+x2,x4,x6
> +[ 	]+[0-9a-f]+:[ 	]+0272f1d3[ 	]+\.4byte[ 	]+0x272f1d3
> diff --git a/gas/testsuite/gas/riscv/zdinx-32-regpair-dis.s b/gas/testsuite/gas/riscv/zdinx-32-regpair-dis.s
> new file mode 100644
> index 00000000000..aa0c72cae87
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/zdinx-32-regpair-dis.s
> @@ -0,0 +1,5 @@
> +target:
> +	# fadd.d x2, x4, x6
> +	.insn	0x02627153
> +	# fadd.d x3, x5, x7 (invalid)
> +	.insn	0x0272f1d3

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>