[PATCH 0/3] RISC-V: Zfinx extension support
Nelson Chu
nelson.chu@sifive.com
Tue Nov 9 10:06:25 GMT 2021
Hi Jiawei,
Thanks for implementing the zfinx support both in gcc and binutils :)
I have given some comments, so please see the details in the related
mails.
Thanks
Nelson
On Fri, Oct 29, 2021 at 12:48 AM jiawei <jiawei@iscas.ac.cn> wrote:
>
> This patch is support zfinx extension on binutils, zfinx is not compatible with any float extension and use gpr replace fpr, we adjust the opreand set when zfinx used. For disassemble part, we add a flag ZFINX(0x10) as ELF-header to distinguish whether use gpr or fpr name for float instructions.
>
> jiawei (3):
> RISC-V: Add mininal support for z[fdq]inx
> RISC-V: Add instructions and operand set for z[fdq]inx
> RISC-V: Add testcases and disassemble support for z[fdq]inx
>
> bfd/elfxx-riscv.c | 32 +++++++
> binutils/readelf.c | 3 +
> gas/config/tc-riscv.c | 33 +++++++-
> gas/testsuite/gas/riscv/zdinx.d | 41 +++++++++
> gas/testsuite/gas/riscv/zdinx.s | 33 ++++++++
> gas/testsuite/gas/riscv/zfinx.d | 39 +++++++++
> gas/testsuite/gas/riscv/zfinx.s | 31 +++++++
> gas/testsuite/gas/riscv/zqinx.d | 43 ++++++++++
> gas/testsuite/gas/riscv/zqinx.s | 35 ++++++++
> include/elf/riscv.h | 3 +
> include/opcode/riscv.h | 3 +
> opcodes/riscv-dis.c | 4 +
> opcodes/riscv-opc.c | 146 ++++++++++++++++++++++++++++++++
> 13 files changed, 443 insertions(+), 3 deletions(-)
> create mode 100644 gas/testsuite/gas/riscv/zdinx.d
> create mode 100644 gas/testsuite/gas/riscv/zdinx.s
> create mode 100644 gas/testsuite/gas/riscv/zfinx.d
> create mode 100644 gas/testsuite/gas/riscv/zfinx.s
> create mode 100644 gas/testsuite/gas/riscv/zqinx.d
> create mode 100644 gas/testsuite/gas/riscv/zqinx.s
>
More information about the Binutils
mailing list