PowerPC POWER10 updates to dcbf, sync and wait instructions

[Alan Modra]

On Sun, May 17, 2020 at 10:36:34PM -0500, Peter Bergner wrote:
> On 5/17/20 9:36 PM, Alan Modra wrote:
> > On Sat, May 16, 2020 at 05:53:20PM -0500, Peter Bergner wrote:
> >> -/* The 2-bit L field in a SYNC or WC field in a WAIT instruction.
> >> +/* The 2-bit/3-bit L or 2-bit WC field in a SYNC, DCBF or WAIT instruction.
> >>     For SYNC, some L values are reserved:
> >> -     * Value 3 is reserved on newer server cpus.
> >> -     * Values 2 and 3 are reserved on all other cpus.  */
> >> +     * Values 3, 6 and 7 are reserved on all cpus.
> >> +     * Value 2 is reserved on all other cpus.
> > 
> > The above needs fixing.
> 
> How so?

You say "3, 6 and 7 are reserved on all cpus".  That doesn't leave
much room for "other cpus".

> 
> > So if "(value & mask) != value" then no checks are done?  That doesn't
> > seem correct.  The same problem occurs later too.
> 
> Well, no checks are done here.  If (value & mask) != value, then
> we've already triggered an operand out of range bug and there is no
> need for another test here.  It's only if the value fits within the
> mask range that we need to check for illegal values within the mask
> range.  If we didn't do this, we'd sometimes end up with an operand
> out of range error and a possible illegal value error.
> 
> Fr example, notice below how line 5 is an illegal value for power10,
> but an out of range error for power9 and earlier.

Oh of course.  Not enough coffee or something.

-- 
Alan Modra
Australia Development Lab, IBM