PowerPC POWER10 updates to dcbf, sync and wait instructions

Peter Bergner bergner@linux.ibm.com
Mon May 18 15:02:17 GMT 2020


On 5/17/20 11:49 PM, Alan Modra wrote:
> On Sun, May 17, 2020 at 10:36:34PM -0500, Peter Bergner wrote:
>> On 5/17/20 9:36 PM, Alan Modra wrote:
>>> On Sat, May 16, 2020 at 05:53:20PM -0500, Peter Bergner wrote:
>>>> -/* The 2-bit L field in a SYNC or WC field in a WAIT instruction.
>>>> +/* The 2-bit/3-bit L or 2-bit WC field in a SYNC, DCBF or WAIT instruction.
>>>>     For SYNC, some L values are reserved:
>>>> -     * Value 3 is reserved on newer server cpus.
>>>> -     * Values 2 and 3 are reserved on all other cpus.  */
>>>> +     * Values 3, 6 and 7 are reserved on all cpus.
>>>> +     * Value 2 is reserved on all other cpus.
>>>
>>> The above needs fixing.
>>
>> How so?
> 
> You say "3, 6 and 7 are reserved on all cpus".  That doesn't leave
> much room for "other cpus".

Well it's true that no cpus support 3, 6 and 7.  Although 6 and 7 are
out of range for cpus before power10.  Values 4 and 5 are the new
values allowed for power10 which are out of range for all other cpus.

Do you want:

	* Values 3, 6 and 7 are reserved on newer server cpus.
	* Value 2 is reserved on all other cpus.

...or this?

	* Values 6 and 7 are reserved on newer server cpus.
	* Value 3 is reserved on older server cpus.
	* Value 2 is reserved on all other cpus.

Or do you have something else in mind?

Peter


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